mirror/nasm
2
0
Fork 0
mirror of https://github.com/netwide-assembler/nasm.git synced 2025-04-06 18:30:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

Add implicitly sized versions of the K instructions

Browse Source 
This allows the K instructions to be specified without a size suffix
as long as the operands are sized; this matches the way most other x86
instructions work. As this is not the syntax specified in the SDM,
don't use it for disassembly.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin (Intel) 2019-08-09 02:44:46 -07:00
parent 602e67f932
commit b1e15f42fe
3 changed files with 233 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
asm/parser.c
View File

@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
* Copyright 1996-2018 The NASM Authors - All Rights Reserved
* Copyright 1996-2019 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@ -1125,8 +1125,29 @@ is_expression:
op->decoflags |= brace_flags;
op->basereg = value->type;
if (rs && (op->type & SIZE_MASK) != rs)
nasm_warn(WARN_OTHER, "register size specification ignored");
if (rs) {
opflags_t opsize = nasm_reg_flags[value->type] & SIZE_MASK;
if (!opsize) {
op->type |= rs; /* For non-size-specific registers, permit size override */
} else if (opsize != rs) {
/*!
*!regsize [on] register size specification ignored
*!
*! warns about a register with implicit size (such as \c{EAX}, which is always 32 bits)
*! been given an explicit size specification which is inconsistent with the size
*! of the named register, e.g. \c{WORD EAX}. \c{DWORD EAX} or \c{WORD AX} are
*! permitted, and do not trigger this warning. Some registers which \e{do not} imply
*! a specific size, such as \c{K0}, may need this specification unless the instruction
*! itself implies the instruction size:
*!
*! \c KMOVW K0,[foo] ; Permitted, KMOVW implies 16 bits
*! \c KMOV WORD K0,[foo] ; Permitted, WORD K0 specifies instruction size
*! \c KMOV K0,WORD [foo] ; Permitted, WORD [foo] specifies instruction size
*! \c KMOV K0,[foo] ; Not permitted, instruction size ambiguous
*/
nasm_warn(WARN_REGSIZE, "invalid register size specification ignored");
}
}
}
}

137
test/k_test.asm Normal file
View File

@ -0,0 +1,137 @@
bits 64
default rel
%use altreg
section .text
bar equ 0xcc
;; Each instruction group separated by blank should encode identially
;; k_mov kreg size_suffix size_name gpr big_gpr
%macro k_mov 5
kmov%2 %1,[foo]
kmov %1,%3 [foo]
kmov %3 [foo],%1
kmov%2 [foo],%1
kmov %3 [foo],%1
kmov [foo],%3 %1
kmov %3 [foo],%1
kmov%2 %1,%1
kmov %3 %1,%1
kmov %1,%3 %1
kmov%2 %1,%4
kmov%2 %1,%5
kmov %1,%4
kmov %3 %1,%4
kmov %3 %1,%5
kmov %1,%3 %4
%ifidni %4,%5
kmov %1,%5
%endif
kmov%2 %5,%1
%ifidni %4,%5
kmov %5,%1
%endif
kmov %5,%3 %1
%endmacro
;; k_rr op kreg size_suffix size_name
%macro k_rr 4
%1%3 %2,%2
%1 %4 %2,%2
%1 %2,%4 %2
%endmacro
;; k_rri op kreg size_suffix size_name
%macro k_rrr 4
%1%3 %2,%2,%2
%1 %4 %2,%2,%2
%1 %2,%4 %2,%2
%1 %2,%2,%4 %2
%endmacro
;; k_rri op kreg size_suffix size_name
%macro k_rri 4
%1%3 %2,%2,bar
%1 %4 %2,%2,bar
%1 %2,%4 %2,bar
%endmacro
%define size_b byte
%define size_w word
%define size_d dword
%define size_q qword
%define gpr_b b
%define gpr_w w
%define gpr_d d
%define gpr_q
%define bgpr_b d
%define bgpr_w d
%define bgpr_d d
%define bgpr_q
;; k_test size_suffix regno
%macro k_test 2
k_mov k%2,%1,size_%1,%[r %+ %2 %+ gpr_%1],%[r %+ %2 %+ bgpr_%1]
k_rrr kadd,k%2,%1,size_%1
k_rrr kand,k%2,%1,size_%1
k_rrr kandn,k%2,%1,size_%1
k_rrr kand,k%2,%1,size_%1
k_rr knot,k%2,%1,size_%1
k_rrr kor,k%2,%1,size_%1
k_rr kortest,k%2,%1,size_%1
k_rri kshiftl,k%2,%1,size_%1
k_rri kshiftr,k%2,%1,size_%1
k_rr ktest,k%2,%1,size_%1
k_rrr kxnor,k%2,%1,size_%1
k_rrr kxor,k%2,%1,size_%1
%endmacro
%assign nreg 0
%define kreg k %+ nreg
%rep 8
k_test b,nreg
k_test w,nreg
k_test d,nreg
k_test q,nreg
kunpckbw kreg,kreg,kreg
kunpck word kreg,kreg,kreg
kunpck kreg,byte kreg,kreg
kunpck kreg,kreg,byte kreg
kunpck word kreg,byte kreg,kreg
kunpck word kreg,kreg,byte kreg
kunpckwd kreg,kreg,kreg
kunpck dword kreg,kreg,kreg
kunpck kreg,word kreg,kreg
kunpck kreg,kreg,word kreg
kunpck dword kreg,word kreg,kreg
kunpck dword kreg,kreg,word kreg
kunpckdq kreg,kreg,kreg
kunpck qword kreg,kreg,kreg
kunpck kreg,dword kreg,kreg
kunpck kreg,kreg,dword kreg
kunpck qword kreg,dword kreg,kreg
kunpck qword kreg,kreg,dword kreg
%assign nreg nreg+1
%endrep
section .bss
foo resq 1

74
x86/insns.dat
View File

@ -1,6 +1,6 @@
;; --------------------------------------------------------------------------
;;
;; Copyright 1996-2018 The NASM Authors - All Rights Reserved
;; Copyright 1996-2019 The NASM Authors - All Rights Reserved
;; See the file AUTHORS included with the NASM distribution for
;; the specific copyright holders.
;;
@ -3614,6 +3614,7 @@ KANDW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 41 /r
KMOVB kreg,krm8 [rm: vex.l0.66.0f.w0 90 /r ] FUTURE
KMOVB mem8,kreg [mr: vex.l0.66.0f.w0 91 /r ] FUTURE
KMOVB kreg,reg32 [rm: vex.l0.66.0f.w0 92 /r ] FUTURE
KMOVB kreg,reg8 [rm: vex.l0.66.0f.w0 92 nohi /r ] FUTURE,ND
KMOVB reg32,kreg [rm: vex.l0.66.0f.w0 93 /r ] FUTURE
KMOVD kreg,krm32 [rm: vex.l0.66.0f.w1 90 /r ] FUTURE
KMOVD mem32,kreg [mr: vex.l0.66.0f.w1 91 /r ] FUTURE
@ -3626,6 +3627,7 @@ KMOVQ reg64,kreg [rm: vex.l0.f2.0f.w1 93 /r ]
KMOVW kreg,krm16 [rm: vex.l0.0f.w0 90 /r ] FUTURE
KMOVW mem16,kreg [mr: vex.l0.0f.w0 91 /r ] FUTURE
KMOVW kreg,reg32 [rm: vex.l0.0f.w0 92 /r ] FUTURE
KMOVW kreg,reg16 [rm: vex.l0.0f.w0 92 /r ] FUTURE,ND
KMOVW reg32,kreg [rm: vex.l0.0f.w0 93 /r ] FUTURE
KNOTB kreg,kreg [rm: vex.l0.66.0f.w0 44 /r ] FUTURE
KNOTD kreg,kreg [rm: vex.l0.66.0f.w1 44 /r ] FUTURE
@ -3634,11 +3636,11 @@ KNOTW kreg,kreg [rm: vex.l0.0f.w0 44 /r ] FU
KORB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 45 /r ] FUTURE
KORD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 45 /r ] FUTURE
KORQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 45 /r ] FUTURE
KORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 45 /r ] FUTURE
KORTESTB kreg,kreg [rm: vex.l0.66.0f.w0 98 /r ] FUTURE
KORTESTD kreg,kreg [rm: vex.l0.66.0f.w1 98 /r ] FUTURE
KORTESTQ kreg,kreg [rm: vex.l0.0f.w1 98 /r ] FUTURE
KORTESTW kreg,kreg [rm: vex.l0.0f.w0 98 /r ] FUTURE
KORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 45 /r ] FUTURE
KSHIFTLB kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] FUTURE
KSHIFTLD kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] FUTURE
KSHIFTLQ kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] FUTURE
@ -3663,6 +3665,74 @@ KXORD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 47
KXORQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 47 /r ] FUTURE
KXORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 47 /r ] FUTURE
;# AVX-512 mask register instructions (aliases requiring explicit size support)
KADD kreg8,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 4a /r ] FUTURE,ND,SM
KADD kreg32,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 4a /r ] FUTURE,ND,SM
KADD kreg64,kreg,kreg [rvm: vex.nds.l1.0f.w1 4a /r ] FUTURE,ND,SM
KADD kreg16,kreg,kreg [rvm: vex.nds.l1.0f.w0 4a /r ] FUTURE,ND,SM
KAND kreg8,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 41 /r ] FUTURE,ND,SM
KAND kreg32,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 41 /r ] FUTURE,ND,SM
KANDN kreg64,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 42 /r ] FUTURE,ND,SM
KANDN kreg16,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 42 /r ] FUTURE,ND,SM
KANDN kreg8,kreg,kreg [rvm: vex.nds.l1.0f.w1 42 /r ] FUTURE,ND,SM
KANDN kreg32,kreg,kreg [rvm: vex.nds.l1.0f.w0 42 /r ] FUTURE,ND,SM
KAND kreg64,kreg,kreg [rvm: vex.nds.l1.0f.w1 41 /r ] FUTURE,ND,SM
KAND kreg16,kreg,kreg [rvm: vex.nds.l1.0f.w0 41 /r ] FUTURE,ND,SM
KMOV kreg8,krm8 [rm: vex.l0.66.0f.w0 90 /r ] FUTURE,ND,SM
KMOV mem8,kreg8 [mr: vex.l0.66.0f.w0 91 /r ] FUTURE,ND,SB,SM
KMOV kreg8,reg32 [rm: vex.l0.66.0f.w0 92 /r ] FUTURE,ND,SX
KMOV kreg8,reg8 [rm: vex.l0.66.0f.w0 92 /r ] FUTURE,ND,SM
KMOV reg32,kreg8 [rm: vex.l0.66.0f.w0 93 /r ] FUTURE,ND,SX
KMOV kreg32,krm32 [rm: vex.l0.66.0f.w1 90 /r ] FUTURE,ND,SM
KMOV mem32,kreg32 [mr: vex.l0.66.0f.w1 91 /r ] FUTURE,ND,SM
KMOV kreg32,reg32 [rm: vex.l0.f2.0f.w0 92 /r ] FUTURE,ND,SM
KMOV reg32,kreg32 [rm: vex.l0.f2.0f.w0 93 /r ] FUTURE,ND,SM
KMOV kreg64,krm64 [rm: vex.l0.0f.w1 90 /r ] FUTURE,ND,SM
KMOV mem64,kreg64 [mr: vex.l0.0f.w1 91 /r ] FUTURE,ND,SM
KMOV kreg64,reg64 [rm: vex.l0.f2.0f.w1 92 /r ] FUTURE,ND,SM
KMOV reg64,kreg64 [rm: vex.l0.f2.0f.w1 93 /r ] FUTURE,ND,SM
KMOV kreg16,krm16 [rm: vex.l0.0f.w0 90 /r ] FUTURE,ND,SM
KMOV mem16,kreg16 [mr: vex.l0.0f.w0 91 /r ] FUTURE,ND,SM
KMOV kreg16,reg32 [rm: vex.l0.0f.w0 92 /r ] FUTURE,ND,SX
KMOV reg32,kreg16 [rm: vex.l0.0f.w0 93 /r ] FUTURE,ND,SX
KMOV kreg16,reg32 [rm: vex.l0.0f.w0 92 /r ] FUTURE,ND,SX
KMOV kreg16,reg16 [rm: vex.l0.0f.w0 92 /r ] FUTURE,ND,SM
KNOT kreg8,kreg8 [rm: vex.l0.66.0f.w0 44 /r ] FUTURE,ND,SM
KNOT kreg32,kreg32 [rm: vex.l0.66.0f.w1 44 /r ] FUTURE,ND,SM
KNOT kreg64,kreg64 [rm: vex.l0.0f.w1 44 /r ] FUTURE,ND,SM
KNOT kreg16,kreg16 [rm: vex.l0.0f.w0 44 /r ] FUTURE,ND,SM
KOR kreg8,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 45 /r ] FUTURE,ND,SM
KOR kreg32,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 45 /r ] FUTURE,ND,SM
KOR kreg64,kreg,kreg [rvm: vex.nds.l1.0f.w1 45 /r ] FUTURE,ND,SM
KOR kreg16,kreg,kreg [rvm: vex.nds.l1.0f.w0 45 /r ] FUTURE,ND,SM
KORTEST kreg8,kreg [rm: vex.l0.66.0f.w0 98 /r ] FUTURE,ND,SM
KORTEST kreg32,kreg [rm: vex.l0.66.0f.w1 98 /r ] FUTURE,ND,SM
KORTEST kreg64,kreg [rm: vex.l0.0f.w1 98 /r ] FUTURE,ND,SM
KORTEST kreg16,kreg [rm: vex.l0.0f.w0 98 /r ] FUTURE,ND,SM
KSHIFTL kreg8,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] FUTURE,ND,SM2
KSHIFTL kreg32,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] FUTURE,ND,SM2
KSHIFTL kreg64,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] FUTURE,ND,SM2
KSHIFTL kreg16,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] FUTURE,ND,SM2
KSHIFTR kreg8,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] FUTURE,ND,SM2
KSHIFTR kreg32,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] FUTURE,ND,SM2
KSHIFTR kreg64,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] FUTURE,ND,SM2
KSHIFTR kreg16,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] FUTURE,ND,SM2
KTEST kreg8,kreg [rm: vex.l0.66.0f.w0 99 /r ] FUTURE,ND,SM
KTEST kreg32,kreg [rm: vex.l0.66.0f.w1 99 /r ] FUTURE,ND,SM
KTEST kreg64,kreg [rm: vex.l0.0f.w1 99 /r ] FUTURE,ND,SM
KTEST kreg16,kreg [rm: vex.l0.0f.w0 99 /r ] FUTURE,ND,SM
KUNPCK kreg16,kreg8,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] FUTURE,ND
KUNPCK kreg64,kreg32,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] FUTURE,ND
KUNPCK kreg32,kreg16,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] FUTURE,ND
KXNOR kreg8,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 46 /r ] FUTURE,ND,SM
KXNOR kreg32,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 46 /r ] FUTURE,ND,SM
KXNOR kreg64,kreg,kreg [rvm: vex.nds.l1.0f.w1 46 /r ] FUTURE,ND,SM
KXNOR kreg16,kreg,kreg [rvm: vex.nds.l1.0f.w0 46 /r ] FUTURE,ND,SM
KXOR kreg8,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 47 /r ] FUTURE,ND,SM
KXOR kreg32,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 47 /r ] FUTURE,ND,SM
KXOR kreg64,kreg,kreg [rvm: vex.nds.l1.0f.w1 47 /r ] FUTURE,ND,SM
KXOR kreg16,kreg,kreg [rvm: vex.nds.l1.0f.w0 47 /r ] FUTURE,ND,SM
;# AVX-512 instructions
VADDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 58 /r ] AVX512VL,AVX512,FUTURE
VADDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 58 /r ] AVX512VL,AVX512,FUTURE