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NASM 0.98.25
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README.1st
273
README.1st
@ -1,187 +1,100 @@
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This is a specially patched version of NASM. It can be used to supplement
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building of Crystal Space, the Open Source 3D Engine project. You can find
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Crystal Space at the following locations:
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PROLOGUE
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http://crystal.linuxgames.com/
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http://crystal.sourceforge.net/
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One day someone wrote that nasm needs:
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Details of changes in this version of NASM follow.
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> - A good ALIGN mechanism, similar to GAS's. GAS pads out space by
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> means of the following (32-bit) instructions:
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> 8DB42600000000 lea esi,[esi+0x0]
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> 8DB600000000 lea esi,[esi+0x0]
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> 8D742600 lea esi,[esi+0x0]
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> 8D7600 lea esi,[esi+0x0]
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> 8D36 lea esi,[esi]
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> 90 nop
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> It uses up to two of these instructions to do up to 14-byte pads;
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> when more than 14 bytes are needed, it issues a (short) jump to
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> the end of the padded section and then NOPs the rest. Come up with
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> a similar scheme for 16 bit mode, and also come up with a way to
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> use it - internal to the assembler, so that programs using ALIGN
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> don't knock over preprocess-only mode.
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> Also re-work the macro form so that when given one argument in a
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> code section it calls this feature.
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-*- A new keyword %xdefine and its case-insensitive counterpart %ixdefine.
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They work almost the same way as %define and %idefine but expand
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the definition immediately, not on the invocation. Something like a cross
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between %define and %assign. The "x" suffix stands for "eXpand", so
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"xdefine" can be deciphered as "expand-and-define". Thus you can do
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things like this:
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Well palign is your friend.
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%assign ofs 0
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This is a modified version of nasm-0.98.24 that can accept
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two new directives.The two new directives that control
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the align mechanism are 'palign' and 'p2align'.They are nasm directives
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that don't depend on preprocessor but rather align the code while assembling
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in a gas-like style.
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The syntax of these directives is
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[palign n] where '0 <= n <= 6' and
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[p2align n] where '0 <= n <=6'
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The use of these directives is
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[palign n]
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Pad the location counter to a particular storage boundary.
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The n is a number between 0 and 6 of low-order zero bits the location counter
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must have after advancement.
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For example `palign 3' advances the location counter until
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it a multiple of 8.If the location counter is already a multiple of 8,
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no change is needed.
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If n=0 then nothing is done
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if n => 6 then palign advances the location counter until it a multiple
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of 64.For now the maximum is 64 bytes,if you want more use the ALIGN macro.
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[p2align n]
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This directive do almost the same thing with a little exception.
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It will continue aligning until a directive [p2align 0] meet or until
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the current section changes.So this piece of code
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BITS 32
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SECTION .text
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[p2align 5]
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%macro arg 1
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%xdefine %1 dword [esp+ofs]
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%assign ofs ofs+4
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%endmacro
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-*- Changed the place where the expansion of %$name macros are expanded.
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Now they are converted into ..@ctxnum.name form when detokenizing, so
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there are no quirks as before when using %$name arguments to macros,
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in macros etc. For example:
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%macro abc 1
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%define %1 hello
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%endm
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abc %$here
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%$here
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Now last line will be expanded to "hello" as expected. This also allows
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for lots of goodies, a good example are extended "proc" macros included
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in this archive.
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-*- Added a check for "cstk" in smacro_defined() before calling get_ctx() -
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this allows for things like:
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%ifdef %$abc
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%endif
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to work without warnings even in no context.
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-*- Added a check for "cstk" in %if*ctx and %elif*ctx directives -
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this allows to use %ifctx without excessive warnings. If there is
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no active context, %ifctx goes through "false" branch.
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-*- Removed "user error: " prefix with %error directive: it just clobbers the
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output and has absolutely no functionality. Besides, this allows to write
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macros that does not differ from build-in functions in any way.
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-*- Added expansion of string that is output by %error directive. Now you
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can do things like:
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%define hello(x) Hello, x!
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%define %$name andy
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%error "hello(%$name)"
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Same happened with %include directive.
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-*- Now all directives that expect an identifier will try to expand and
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concatenate everything without whitespaces in between before usage.
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For example, with "unfixed" nasm the commands
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%define %$abc hello
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%define __%$abc goodbye
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__%$abc
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would produce "incorrect" output: last line will expand to
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hello goodbyehello
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Not quite what you expected, eh? :-) The answer is that preprocessor
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treats the %define construct as if it would be
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%define __ %$abc goodbye
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(note the white space between __ and %$abc). After my "fix" it
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will "correctly" expand into
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goodbye
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as expected. Note that I use quotes around words "correct", "incorrect"
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etc because this is rather a feature not a bug; however current behaviour
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is more logical (and allows more advanced macro usage :-).
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Same change was applied to:
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%push,%macro,%imacro,%define,%idefine,%xdefine,%ixdefine,
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%assign,%iassign,%undef
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-*- A new directive [WARNING {+|-}warning-id] have been added. It works only
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if the assembly phase is enabled (i.e. it doesn't work with nasm -e).
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-*- A new warning type: macro-selfref. By default this warning is disabled;
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when enabled NASM warns when a macro self-references itself; for example
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the following source:
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[WARNING macro-selfref]
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%macro push 1-*
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%rep %0
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push %1
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%rotate 1
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%endrep
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%endmacro
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push eax,ebx,ecx
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will produce a warning, but if we remove the first line we won't see it
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anymore (which is The Right Thing To Do {tm} IMHO since C preprocessor
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eats such constructs without warnings at all).
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-*- Added a "error" routine to preprocessor which always will set ERR_PASS1
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bit in severity_code. This removes annoying repeated errors on first
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and second passes from preprocessor.
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-*- Added the %+ operator in single-line macros for concatenating two
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identifiers. Usage example:
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%define _myfunc _otherfunc
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%define cextern(x) _ %+ x
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cextern (myfunc)
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After first expansion, third line will become "_myfunc". After this
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expansion is performed again so it becomes "_otherunc".
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-*- Now if preprocessor is in a non-emmitting state, no warning or error
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will be emmitted. Example:
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%if 1
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mov eax,ebx
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%else
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put anything you want between these two brackets,
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even macro-parameter references %1 or local labels %$zz
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or macro-local labels %%zz - no warning will be emmitted.
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%endif
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-*- Context-local variables on expansion as a last resort are looked up
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in outer contexts. For example, the following piece:
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%push outer
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%define %$a [esp]
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%push inner
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%$a
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%pop
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%pop
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will expand correctly the fourth line to [esp]; if we'll define another
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%$a inside the "inner" context, it will take precedence over outer
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definition. However, this modification has been applied only to
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expand_smacro and not to smacro_define: as a consequence expansion
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looks in outer contexts, but %ifdef won't look in outer contexts.
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This behaviour is needed because we don't want nested contexts to
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act on already defined local macros. Example:
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%define %$arg1 [esp+4]
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test eax,eax
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if nz
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mov eax,%$arg1
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endif
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In this example the "if" mmacro enters into the "if" context, so %$arg1
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is not valid anymore inside "if". Of course it could be worked around
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by using explicitely %$$arg1 but this is ugly IMHO.
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-------------------------------// fixes for 0.98 //-----------------------------
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-*- Fixed memory leak in %undef. The origline wasn't freed before
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exiting on success.
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-----------------------------// Fixes for 0.98.01 //----------------------------
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-*- Fixed trap in preprocessor when line expanded to empty set of tokens.
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This happens, for example, in the following case:
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#define SOMETHING
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SOMETHING
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;some code here
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Andrew Zabolotny <bit@eltech.ru>
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SECTION .data
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;some data here
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guarantee that all the instructions in the code segment will be aligned
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in a 32 byte boundary so than no instruction break the cache line on a
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pentium processor.
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BUGS
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Well my english are very very bad.
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This optimization will not work
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for now for 16-bit code.
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Also there may be a problem with the prefixes like ds,es,rep,lock etc
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so this code will work
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'rep movsd'
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but this may not work
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'rep'
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'movsd'
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if you want to be sure put the prefix in the same line
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with the instruction.
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Also don't try this in a data or a bss segment.Use the ALIGN macro better
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FEEDBACK
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If you have any suggestion, comment or found a bug please email me
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and i will try to reply immediately.
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From your feedback it depends this project to get better as i intend
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to implement more things and improve the code in the next version of nasm.
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AUTHOR
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Panos Minos 03-04-2002
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email: <panosminos@mycosmos.gr> , <panosminos1@mycosmos.gr>
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@ -941,6 +941,10 @@ of any combination of a label, an instruction and a comment is allowed.
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Of course, the operand field is either required or forbidden by the
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presence and nature of the instruction field.
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NASM uses backslash (\\) as the line continuation character; if a line
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ends with backslash, the next line is considered to be a part of the
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backslash-ended line.
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NASM places no restrictions on white space within a line: labels may
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have white space before them, or instructions may have no space
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before them, or anything. The \i{colon} after a label is also
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@ -1579,6 +1583,13 @@ conditional assembly, multi-level file inclusion, two forms of macro
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extra macro power. Preprocessor directives all begin with a \c{%}
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sign.
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The preprocessor collapses all lines which end with a backslash (\\)
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character into a single line. Thus:
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\c %define THIS_VERY_LONG_MACRO_NAME_IS_DEFINED_TO \\
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\c THIS_VALUE
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will work as expected.
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\H{slmacro} \i{Single-Line Macros}
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@ -7192,7 +7203,7 @@ This is a larger and more unwieldy version of \c{CMPXCHG}: it
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compares the 64-bit (eight-byte) value stored at \c{[mem]} with the
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value in \c{EDX:EAX}. If they are equal, it sets the zero flag and
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stores \c{ECX:EBX} into the memory area. If they are unequal, it
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clears the zero flag and leaves the memory area untouched.
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clears the zero flag and stores the memory contents into \c{EDX:EAX}.
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\c{CMPXCHG8B} can be used with the \c{LOCK} prefix, to allow atomic
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execution. This is useful in multi-processor and multi-tasking
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53
insns.dat
53
insns.dat
@ -36,6 +36,7 @@ ADC reg32,reg32 \321\301\1\x13\110 386
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ADC rm16,imm8 \320\300\1\x83\202\15 8086
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ADC rm32,imm8 \321\300\1\x83\202\15 386
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ADC reg_al,imm \1\x14\21 8086,SM
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ADC reg_ax,sbyte \320\1\x83\202\15 8086,SM,ND
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ADC reg_ax,imm \320\1\x15\31 8086,SM
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ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND
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ADC reg_eax,imm \321\1\x15\41 386,SM
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@ -60,6 +61,7 @@ ADD reg32,reg32 \321\301\1\x03\110 386
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ADD rm16,imm8 \320\300\1\x83\200\15 8086
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ADD rm32,imm8 \321\300\1\x83\200\15 386
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ADD reg_al,imm \1\x04\21 8086,SM
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ADD reg_ax,sbyte \320\1\x83\200\15 8086,SM,ND
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ADD reg_ax,imm \320\1\x05\31 8086,SM
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ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND
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ADD reg_eax,imm \321\1\x05\41 386,SM
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@ -84,6 +86,7 @@ AND reg32,reg32 \321\301\1\x23\110 386
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AND rm16,imm8 \320\300\1\x83\204\15 8086
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AND rm32,imm8 \321\300\1\x83\204\15 386
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AND reg_al,imm \1\x24\21 8086,SM
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AND reg_ax,sbyte \320\1\x83\204\15 8086,SM,ND
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AND reg_ax,imm \320\1\x25\31 8086,SM
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AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND
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AND reg_eax,imm \321\1\x25\41 386,SM
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@ -136,9 +139,9 @@ CALL imm|far \322\1\x9A\34\37 8086,ND
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CALL imm16 \320\1\xE8\64 8086
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CALL imm16|near \320\1\xE8\64 8086
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CALL imm16|far \320\1\x9A\34\37 8086,ND
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CALL imm32 \321\1\xE8\64 8086
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CALL imm32|near \321\1\xE8\64 8086
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CALL imm32|far \321\1\x9A\34\37 8086,ND
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CALL imm32 \321\1\xE8\64 386
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CALL imm32|near \321\1\xE8\64 386
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CALL imm32|far \321\1\x9A\34\37 386,ND
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CALL imm:imm \322\1\x9A\35\30 8086
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CALL imm16:imm \320\1\x9A\31\30 8086
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CALL imm:imm16 \320\1\x9A\31\30 8086
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@ -177,6 +180,7 @@ CMP reg32,reg32 \321\301\1\x3B\110 386
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CMP rm16,imm8 \320\300\1\x83\207\15 8086
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CMP rm32,imm8 \321\300\1\x83\207\15 386
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CMP reg_al,imm \1\x3C\21 8086,SM
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CMP reg_ax,sbyte \320\1\x83\207\15 8086,SM,ND
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CMP reg_ax,imm \320\1\x3D\31 8086,SM
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CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND
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CMP reg_eax,imm \321\1\x3D\41 386,SM
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@ -291,7 +295,7 @@ FDIVRP fpureg,fpu0 \1\xDE\10\xF0 8086,FPU
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FEMMS void \2\x0F\x0E PENT,3DNOW
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FENI void \3\x9B\xDB\xE0 8086,FPU
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FFREE fpureg \1\xDD\10\xC0 8086,FPU
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FFREEP fpureg \1\xDF\10\xC0 P6,FPU,UNDOC
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FFREEP fpureg \1\xDF\10\xC0 286,FPU,UNDOC
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FIADD mem32 \300\1\xDA\200 8086,FPU
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FIADD mem16 \300\1\xDE\200 8086,FPU
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FICOM mem32 \300\1\xDA\202 8086,FPU
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@ -482,9 +486,9 @@ JMP imm|far \322\1\xEA\34\37 8086,ND
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JMP imm16 \320\1\xE9\64 8086
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JMP imm16|near \320\1\xE9\64 8086,ND
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JMP imm16|far \320\1\xEA\34\37 8086,ND
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JMP imm32 \321\1\xE9\64 8086
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JMP imm32|near \321\1\xE9\64 8086,ND
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JMP imm32|far \321\1\xEA\34\37 8086,ND
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JMP imm32 \321\1\xE9\64 386
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JMP imm32|near \321\1\xE9\64 386,ND
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JMP imm32|far \321\1\xEA\34\37 386,ND
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JMP imm:imm \322\1\xEA\35\30 8086
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JMP imm16:imm \320\1\xEA\31\30 8086
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JMP imm:imm16 \320\1\xEA\31\30 8086
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@ -504,15 +508,15 @@ JMP mem32 \321\300\1\xFF\204 386
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LAHF void \1\x9F 8086
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LAR reg16,mem \320\301\2\x0F\x02\110 286,PROT,SM
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LAR reg16,reg16 \320\301\2\x0F\x02\110 286,PROT
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LAR reg32,mem \321\301\2\x0F\x02\110 286,PROT,SM
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LAR reg32,reg32 \321\301\2\x0F\x02\110 286,PROT
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LAR reg32,mem \321\301\2\x0F\x02\110 386,PROT,SM
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LAR reg32,reg32 \321\301\2\x0F\x02\110 386,PROT
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LDS reg16,mem \320\301\1\xC5\110 8086
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LDS reg32,mem \321\301\1\xC5\110 8086
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LDS reg32,mem \321\301\1\xC5\110 386
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LEA reg16,mem \320\301\1\x8D\110 8086
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LEA reg32,mem \321\301\1\x8D\110 8086
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LEA reg32,mem \321\301\1\x8D\110 386
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LEAVE void \1\xC9 186
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LES reg16,mem \320\301\1\xC4\110 8086
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LES reg32,mem \321\301\1\xC4\110 8086
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LES reg32,mem \321\301\1\xC4\110 386
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LFS reg16,mem \320\301\2\x0F\xB4\110 386
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LFS reg32,mem \321\301\2\x0F\xB4\110 386
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LGDT mem \300\2\x0F\x01\202 286,PRIV
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@ -547,8 +551,8 @@ LOOPZ imm,reg_cx \310\1\xE1\50 8086
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LOOPZ imm,reg_ecx \311\1\xE1\50 386
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LSL reg16,mem \320\301\2\x0F\x03\110 286,PROT,SM
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LSL reg16,reg16 \320\301\2\x0F\x03\110 286,PROT
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LSL reg32,mem \321\301\2\x0F\x03\110 286,PROT,SM
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LSL reg32,reg32 \321\301\2\x0F\x03\110 286,PROT
|
||||
LSL reg32,mem \321\301\2\x0F\x03\110 386,PROT,SM
|
||||
LSL reg32,reg32 \321\301\2\x0F\x03\110 386,PROT
|
||||
LSS reg16,mem \320\301\2\x0F\xB2\110 386
|
||||
LSS reg32,mem \321\301\2\x0F\xB2\110 386
|
||||
LTR mem \300\1\x0F\17\203 286,PROT,PRIV
|
||||
@ -560,14 +564,14 @@ MOV mem,reg_fsgs \300\1\x8C\101 386,SM
|
||||
MOV reg16,reg_cs \320\300\1\x8C\201 8086
|
||||
MOV reg16,reg_dess \320\300\1\x8C\101 8086
|
||||
MOV reg16,reg_fsgs \320\300\1\x8C\101 386
|
||||
MOV reg32,reg_cs \321\300\1\x8C\201 8086
|
||||
MOV reg32,reg_dess \321\300\1\x8C\101 8086
|
||||
MOV reg32,reg_cs \321\300\1\x8C\201 386
|
||||
MOV reg32,reg_dess \321\300\1\x8C\101 386
|
||||
MOV reg32,reg_fsgs \321\300\1\x8C\101 386
|
||||
MOV reg_dess,mem \301\1\x8E\110 8086,SM
|
||||
MOV reg_fsgs,mem \301\1\x8E\110 386,SM
|
||||
MOV reg_dess,reg16 \301\1\x8E\110 8086
|
||||
MOV reg_fsgs,reg16 \301\1\x8E\110 386
|
||||
MOV reg_dess,reg32 \301\1\x8E\110 8086
|
||||
MOV reg_dess,reg32 \301\1\x8E\110 386
|
||||
MOV reg_fsgs,reg32 \301\1\x8E\110 386
|
||||
MOV reg_al,mem_offs \301\1\xA0\35 8086,SM
|
||||
MOV reg_ax,mem_offs \301\320\1\xA1\35 8086,SM
|
||||
@ -648,6 +652,7 @@ OR reg32,reg32 \321\301\1\x0B\110 386
|
||||
OR rm16,imm8 \320\300\1\x83\201\15 8086
|
||||
OR rm32,imm8 \321\300\1\x83\201\15 386
|
||||
OR reg_al,imm \1\x0C\21 8086,SM
|
||||
OR reg_ax,sbyte \320\1\x83\201\15 8086,SM,ND
|
||||
OR reg_ax,imm \320\1\x0D\31 8086,SM
|
||||
OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND
|
||||
OR reg_eax,imm \321\1\x0D\41 386,SM
|
||||
@ -825,11 +830,11 @@ PUNPCKHDQ mmxreg,mem \301\2\x0F\x6A\110 PENT,MMX,SM
|
||||
PUNPCKHDQ mmxreg,mmxreg \2\x0F\x6A\110 PENT,MMX
|
||||
PUNPCKHWD mmxreg,mem \301\2\x0F\x69\110 PENT,MMX,SM
|
||||
PUNPCKHWD mmxreg,mmxreg \2\x0F\x69\110 PENT,MMX
|
||||
PUNPCKLBW mmxreg,mem \301\2\x0F\x60\110 PENT,MMX,SM
|
||||
PUNPCKLBW mmxreg,mem32 \301\2\x0F\x60\110 PENT,MMX
|
||||
PUNPCKLBW mmxreg,mmxreg \2\x0F\x60\110 PENT,MMX
|
||||
PUNPCKLDQ mmxreg,mem \301\2\x0F\x62\110 PENT,MMX,SM
|
||||
PUNPCKLDQ mmxreg,mem32 \301\2\x0F\x62\110 PENT,MMX
|
||||
PUNPCKLDQ mmxreg,mmxreg \2\x0F\x62\110 PENT,MMX
|
||||
PUNPCKLWD mmxreg,mem \301\2\x0F\x61\110 PENT,MMX,SM
|
||||
PUNPCKLWD mmxreg,mem32 \301\2\x0F\x61\110 PENT,MMX
|
||||
PUNPCKLWD mmxreg,mmxreg \2\x0F\x61\110 PENT,MMX
|
||||
PUSH reg16 \320\10\x50 8086
|
||||
PUSH reg32 \321\10\x50 386
|
||||
@ -868,7 +873,7 @@ RCR rm16,imm \320\300\1\xC1\203\25 186,SB
|
||||
RCR rm32,unity \321\300\1\xD1\203 386
|
||||
RCR rm32,reg_cl \321\300\1\xD3\203 386
|
||||
RCR rm32,imm \321\300\1\xC1\203\25 386,SB
|
||||
RDSHR void \2\x0F\x36 P6,CYRIX,SMM
|
||||
RDSHR rm32 \321\300\2\x0F\x36\200 P6,CYRIX,SMM
|
||||
RDMSR void \2\x0F\x32 PENT,PRIV
|
||||
RDPMC void \2\x0F\x33 P6
|
||||
RDTSC void \2\x0F\x31 PENT
|
||||
@ -940,6 +945,7 @@ SBB reg32,reg32 \321\301\1\x1B\110 386
|
||||
SBB rm16,imm8 \320\300\1\x83\203\15 8086
|
||||
SBB rm32,imm8 \321\300\1\x83\203\15 8086
|
||||
SBB reg_al,imm \1\x1C\21 8086,SM
|
||||
SBB reg_ax,sbyte \320\1\x83\203\15 8086,SM,ND
|
||||
SBB reg_ax,imm \320\1\x1D\31 8086,SM
|
||||
SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND
|
||||
SBB reg_eax,imm \321\1\x1D\41 386,SM
|
||||
@ -1022,6 +1028,7 @@ SUB reg32,reg32 \321\301\1\x2B\110 386
|
||||
SUB rm16,imm8 \320\300\1\x83\205\15 8086
|
||||
SUB rm32,imm8 \321\300\1\x83\205\15 386
|
||||
SUB reg_al,imm \1\x2C\21 8086,SM
|
||||
SUB reg_ax,sbyte \320\1\x83\205\15 8086,SM,ND
|
||||
SUB reg_ax,imm \320\1\x2D\31 8086,SM
|
||||
SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND
|
||||
SUB reg_eax,imm \321\1\x2D\41 386,SM
|
||||
@ -1056,6 +1063,7 @@ TEST rm32,imm \321\300\1\xF7\200\41 386,SM
|
||||
TEST mem,imm8 \300\1\xF6\200\21 8086,SM
|
||||
TEST mem,imm16 \320\300\1\xF7\200\31 8086,SM
|
||||
TEST mem,imm32 \321\300\1\xF7\200\41 386,SM
|
||||
UD0 void \2\x0F\xFF 286,UNDOC
|
||||
UD1 void \2\x0F\xB9 286,UNDOC
|
||||
UD2 void \2\x0F\x0B 286
|
||||
UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM
|
||||
@ -1079,7 +1087,7 @@ VERW reg16 \300\1\x0F\17\205 286,PROT
|
||||
WAIT void \1\x9B 8086
|
||||
FWAIT void \1\x9B 8086
|
||||
WBINVD void \2\x0F\x09 486,PRIV
|
||||
WRSHR void \2\x0F\x37 P6,CYRIX,SMM
|
||||
WRSHR rm32 \321\300\2\x0F\x37\200 P6,CYRIX,SMM
|
||||
WRMSR void \2\x0F\x30 PENT,PRIV
|
||||
XADD mem,reg8 \300\2\x0F\xC0\101 486,SM
|
||||
XADD reg8,reg8 \300\2\x0F\xC0\101 486
|
||||
@ -1124,6 +1132,7 @@ XOR reg32,reg32 \321\301\1\x33\110 386
|
||||
XOR rm16,imm8 \320\300\1\x83\206\15 8086
|
||||
XOR rm32,imm8 \321\300\1\x83\206\15 386
|
||||
XOR reg_al,imm \1\x34\21 8086,SM
|
||||
XOR reg_ax,sbyte \320\1\x83\206\15 8086,SM,ND
|
||||
XOR reg_ax,imm \320\1\x35\31 8086,SM
|
||||
XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND
|
||||
XOR reg_eax,imm \321\1\x35\41 386,SM
|
||||
|
2
nasm.h
2
nasm.h
@ -13,7 +13,7 @@
|
||||
|
||||
#define NASM_MAJOR_VER 0
|
||||
#define NASM_MINOR_VER 98
|
||||
#define NASM_VER "0.98.24"
|
||||
#define NASM_VER "0.98.25"
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL 0
|
||||
|
23
preproc.c
23
preproc.c
@ -629,7 +629,7 @@ static char *
|
||||
read_line(void)
|
||||
{
|
||||
char *buffer, *p, *q;
|
||||
int bufsize;
|
||||
int bufsize, continued_count;
|
||||
|
||||
if (stdmacpos)
|
||||
{
|
||||
@ -680,6 +680,7 @@ read_line(void)
|
||||
bufsize = BUF_DELTA;
|
||||
buffer = nasm_malloc(BUF_DELTA);
|
||||
p = buffer;
|
||||
continued_count = 0;
|
||||
while (1)
|
||||
{
|
||||
q = fgets(p, bufsize - (p - buffer), istk->fp);
|
||||
@ -688,7 +689,23 @@ read_line(void)
|
||||
p += strlen(p);
|
||||
if (p > buffer && p[-1] == '\n')
|
||||
{
|
||||
break;
|
||||
/* Convert backslash-CRLF line continuation sequences into
|
||||
nothing at all (for DOS and Windows) */
|
||||
if (((p - 2) > buffer) && (p[-3] == '\\') && (p[-2] == '\r')) {
|
||||
p -= 3;
|
||||
*p = 0;
|
||||
continued_count++;
|
||||
}
|
||||
/* Also convert backslash-LF line continuation sequences into
|
||||
nothing at all (for Unix) */
|
||||
else if (((p - 1) > buffer) && (p[-2] == '\\')) {
|
||||
p -= 2;
|
||||
*p = 0;
|
||||
continued_count++;
|
||||
}
|
||||
else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (p - buffer > bufsize - 10)
|
||||
{
|
||||
@ -705,7 +722,7 @@ read_line(void)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
src_set_linnum(src_get_linnum() + istk->lineinc);
|
||||
src_set_linnum(src_get_linnum() + istk->lineinc + continued_count);
|
||||
|
||||
/*
|
||||
* Play safe: remove CRs as well as LFs, if any of either are
|
||||
|
Loading…
x
Reference in New Issue
Block a user