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latevex: add test file

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Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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H. Peter Anvin 2022-12-06 13:41:33 -08:00
parent 9f31c84405
commit 91c33896a3
1 changed files with 33 additions and 0 deletions
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33
test/latevex.asm Normal file
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bits 64
%define YMMWORD yword
vpmadd52luq ymm3,ymm1,YMMWORD[rsi]
vpmadd52luq ymm16,ymm1,YMMWORD[32+rsi]
vpmadd52luq ymm17,ymm1,YMMWORD[64+rsi]
vpmadd52luq ymm18,ymm1,YMMWORD[96+rsi]
vpmadd52luq ymm19,ymm1,YMMWORD[128+rsi]
vpmadd52luq ymm3,ymm2,YMMWORD[rcx]
vpmadd52luq ymm16,ymm2,YMMWORD[32+rcx]
vpmadd52luq ymm17,ymm2,YMMWORD[64+rcx]
vpmadd52luq ymm18,ymm2,YMMWORD[96+rcx]
vpmadd52luq ymm19,ymm2,YMMWORD[128+rcx]
{vex} vpmadd52luq ymm3,ymm1,YMMWORD[rsi]
{vex} vpmadd52luq ymm3,ymm2,YMMWORD[rcx]
cpu latevex
vpmadd52luq ymm3,ymm1,YMMWORD[rsi]
vpmadd52luq ymm16,ymm1,YMMWORD[32+rsi]
vpmadd52luq ymm17,ymm1,YMMWORD[64+rsi]
vpmadd52luq ymm18,ymm1,YMMWORD[96+rsi]
vpmadd52luq ymm19,ymm1,YMMWORD[128+rsi]
vpmadd52luq ymm3,ymm2,YMMWORD[rcx]
vpmadd52luq ymm16,ymm2,YMMWORD[32+rcx]
vpmadd52luq ymm17,ymm2,YMMWORD[64+rcx]
vpmadd52luq ymm18,ymm2,YMMWORD[96+rcx]
vpmadd52luq ymm19,ymm2,YMMWORD[128+rcx]