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Move HLE byte codes to \264..\267
Move the HLE byte codes to \264..\267 so as not to break up an unused group of 8 (\240..\247). Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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7849dd07b9
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38
assemble.c
38
assemble.c
@ -74,16 +74,16 @@
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* an arbitrary value in bits 3..0 (assembled as zero.)
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* \2ab - a ModRM, calculated on EA in operand a, with the spare
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* field equal to digit b.
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* \240 - skip this instruction pattern if HLE prefixes present
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* \241 - instruction takes XRELEASE (F3) with or without lock
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* \242 - instruction takes XACQUIRE/XRELEASE with or without lock
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* \243 - instruction takes XACQUIRE/XRELEASE with lock only
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* \250..\253 - same as \150..\153, except warn if the 64-bit operand
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* is not equal to the truncated and sign-extended 32-bit
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* operand; used for 32-bit immediates in 64-bit mode.
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* \254..\257 - a signed 32-bit operand to be extended to 64 bits.
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* \260..\263 - this instruction uses VEX/XOP rather than REX, with the
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* V field taken from operand 0..3.
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* \264 - skip this instruction pattern if HLE prefixes present
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* \265 - instruction takes XRELEASE (F3) with or without lock
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* \266 - instruction takes XACQUIRE/XRELEASE with or without lock
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* \267 - instruction takes XACQUIRE/XRELEASE with lock only
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* \270 - this instruction uses VEX/XOP rather than REX, with the
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* V field set to 1111b.
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*
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@ -959,18 +959,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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length++;
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break;
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case 0240:
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if (has_prefix(ins, PPS_REP, P_XACQUIRE) ||
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has_prefix(ins, PPS_REP, P_XRELEASE))
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return -1;
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break;
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case 0241:
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case 0242:
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case 0243:
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hleok = c & 3;
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break;
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case4(0250):
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length += is_sbyte32(opx) ? 1 : 4;
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break;
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@ -986,6 +974,18 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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ins->vex_wlp = *codes++;
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break;
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case 0264:
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if (has_prefix(ins, PPS_REP, P_XACQUIRE) ||
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has_prefix(ins, PPS_REP, P_XRELEASE))
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return -1;
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break;
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case 0265:
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case 0266:
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case 0267:
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hleok = c & 3;
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break;
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case 0270:
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ins->rex |= REX_V;
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ins->vexreg = 0;
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@ -1566,9 +1566,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
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offset++;
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break;
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case4(0240):
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break;
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case4(0250):
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data = opx->offset;
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if (opx->wrt == NO_SEG && opx->segment == NO_SEG &&
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@ -1619,6 +1616,9 @@ static void gencode(int32_t segment, int64_t offset, int bits,
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}
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break;
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case4(0264):
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break;
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case4(0274):
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{
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uint64_t uv, um;
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48
disasm.c
48
disasm.c
@ -648,30 +648,6 @@ static int matches(const struct itemplate *t, uint8_t *data,
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break;
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}
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case 0240:
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break;
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case 0241:
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if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0242:
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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else if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0243:
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if (prefix->lock == 0xF0) {
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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else if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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}
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break;
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case4(0250):
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if (s_field_for == op1) {
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opx->offset = gets8(data);
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@ -727,6 +703,30 @@ static int matches(const struct itemplate *t, uint8_t *data,
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break;
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}
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case 0264:
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break;
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case 0265:
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if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0266:
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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else if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0267:
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if (prefix->lock == 0xF0) {
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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else if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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}
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break;
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case 0310:
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if (asize != 16)
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return false;
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8
insns.pl
8
insns.pl
@ -707,10 +707,10 @@ sub byte_code_compile($$) {
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'repe' => 0335,
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'nohi' => 0325, # Use spl/bpl/sil/dil even without REX
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'wait' => 0341, # Needs a wait prefix
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'nohle' => 0240,
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'hlexr' => 0241,
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'hlenl' => 0242,
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'hle' => 0243,
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'nohle' => 0264,
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'hlexr' => 0265,
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'hlenl' => 0266,
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'hle' => 0267,
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# This instruction takes XMM VSIB
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'vsibx' => 0374,
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'vm32x' => 0374,
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