From 80d18b55551e43f0c3e390550ecd396b90265fd3 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Tue, 26 Nov 2013 15:21:15 -0800 Subject: [PATCH] iflag: In iflag_cmp() scan from the most significant word down In order for iflag_cmp() to return an ordering that makes sense, we need to scan from the most significant word downward. That way the bits with the higher index consistently are the more significant. This fixes the disassembler vendor selection algorithm. While we are doing that, make that dependency more explicit in the comments. Signed-off-by: H. Peter Anvin --- iflag.h | 4 ++-- insns-iflags.pl | 7 +++++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/iflag.h b/iflag.h index 0764a05c..b1144be2 100644 --- a/iflag.h +++ b/iflag.h @@ -43,9 +43,9 @@ static inline void iflag_set_all(iflag_t *f) static inline int iflag_cmp(const iflag_t *a, const iflag_t *b) { - unsigned int i; + int i; - for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) { + for (i = sizeof(a->field) / sizeof(a->field[0]) - 1; i >= 0; i--) { if (a->field[i] < b->field[i]) return -1; else if (a->field[i] > b->field[i]) diff --git a/insns-iflags.pl b/insns-iflags.pl index 8f8e0092..da2fd9bf 100644 --- a/insns-iflags.pl +++ b/insns-iflags.pl @@ -135,6 +135,9 @@ my %insns_flag_bit = ( # # dword bound, index 3 - cpu type flags # + # The CYRIX and AMD flags should have the highest bit values; the + # disassembler selection algorithm depends on it. + # "8086" => [ 96, "8086"], "186" => [ 97, "186+"], "286" => [ 98, "286+"], @@ -151,8 +154,8 @@ my %insns_flag_bit = ( "SANDYBRIDGE" => [109, "Sandy Bridge"], "FUTURE" => [110, "Future processor (not yet disclosed)"], "IA64" => [111, "IA64 (in x86 mode)"], - "CYRIX" => [112, "Cyrix-specific"], - "AMD" => [113, "AMD-specific"], + "CYRIX" => [126, "Cyrix-specific"], + "AMD" => [127, "AMD-specific"], ); my %insns_flag_hash = ();