mirror/nasm
2
0
Fork 0
mirror of https://github.com/netwide-assembler/nasm.git synced 2024-11-27 08:10:07 +08:00
Code Issues Packages Projects Releases Wiki Activity

iflag: In iflag_cmp() scan from the most significant word down

Browse Source 
In order for iflag_cmp() to return an ordering that makes sense, we
need to scan from the most significant word downward.  That way the
bits with the higher index consistently are the more significant.

This fixes the disassembler vendor selection algorithm.  While we are
doing that, make that dependency more explicit in the comments.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2013-11-26 15:21:15 -08:00
parent 4b47c77d89
commit 80d18b5555
2 changed files with 7 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
iflag.h
View File

@ -43,9 +43,9 @@ static inline void iflag_set_all(iflag_t *f)
static inline int iflag_cmp(const iflag_t *a, const iflag_t *b)
{
unsigned int i;
int i;
for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {
for (i = sizeof(a->field) / sizeof(a->field[0]) - 1; i >= 0; i--) {
if (a->field[i] < b->field[i])
return -1;
else if (a->field[i] > b->field[i])

7
insns-iflags.pl
View File

@ -135,6 +135,9 @@ my %insns_flag_bit = (
#
# dword bound, index 3 - cpu type flags
#
# The CYRIX and AMD flags should have the highest bit values; the
# disassembler selection algorithm depends on it.
#
"8086" => [ 96, "8086"],
"186" => [ 97, "186+"],
"286" => [ 98, "286+"],
@ -151,8 +154,8 @@ my %insns_flag_bit = (
"SANDYBRIDGE" => [109, "Sandy Bridge"],
"FUTURE" => [110, "Future processor (not yet disclosed)"],
"IA64" => [111, "IA64 (in x86 mode)"],
"CYRIX" => [112, "Cyrix-specific"],
"AMD" => [113, "AMD-specific"],
"CYRIX" => [126, "Cyrix-specific"],
"AMD" => [127, "AMD-specific"],
);
my %insns_flag_hash = ();