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insns.pl: support operands that serve double duty

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Sometimes assembly syntax wants to permit a single operand to serve
multiple functions; allow this.

The disassembler could really use to be smarter about those.
This commit is contained in:
H. Peter Anvin 2008-05-20 11:23:18 -07:00
parent d82dd4f1a3
commit 70a13f5a37
1 changed files with 13 additions and 2 deletions
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15
insns.pl
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@ -491,6 +491,9 @@ sub startseq($) {
# i = immediate
# s = register field of is4/imz2 field
#
# For an operand that should be filled into more than one field,
# enter it as e.g. "r+v".
#
sub byte_code_compile($) {
my($str) = @_;
my $opr;
@ -509,8 +512,14 @@ sub byte_code_compile($) {
$opc = "\L$str";
}
my $op = 0;
for ($i = 0; $i < length($opr); $i++) {
$oppos{substr($opr,$i,1)} = $i;
my $c = substr($opr,$i,1);
if ($c eq '+') {
$op--;
} else {
$oppos{$c} = $op++;
}
}
$prefix_ok = 1;
@ -597,7 +606,9 @@ sub byte_code_compile($) {
} elsif ($oq =~ /^m([0-9]+)$/) {
$m = $1+0;
} elsif ($oq eq 'nds' || $oq eq 'ndd') {
return undef if (!defined($oppos{'v'}));
if (!defined($oppos{'v'})) {
die "$0: $line: vex.$oq without 'v' operand\n";
}
} else {
die "$0: $line: undefined VEX subcode: $oq\n";
}