mirror of
https://github.com/netwide-assembler/nasm.git
synced 2024-11-21 03:14:19 +08:00
disp8: Consolidate a logic to get compressed displacement
Consolidated two separate but similar functions in nasm and ndisasm into a commonly linked source code. To encode and decode the compressed displacement (disp8*N) for EVEX, N value should be derived using various conditions. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
This commit is contained in:
Jin Kyu Song
parent
28d5bf811b
commit
5f3bfee708
@ -89,10 +89,10 @@ NASM = nasm.$(O) nasmlib.$(O) ver.$(O) \
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strfunc.$(O) tokhash.$(O) regvals.$(O) regflags.$(O) \
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ilog2.$(O) \
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lib/strlcpy.$(O) \
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preproc-nop.$(O)
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preproc-nop.$(O) disp8.$(O)
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NDISASM = ndisasm.$(O) disasm.$(O) sync.$(O) nasmlib.$(O) ver.$(O) \
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insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O)
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insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O) disp8.$(O)
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#-- End File Lists --#
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all: nasm$(X) ndisasm$(X) manpages rdf
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85
assemble.c
85
assemble.c
@ -180,6 +180,7 @@
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#include "assemble.h"
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#include "insns.h"
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#include "tables.h"
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#include "disp8.h"
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enum match_result {
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/*
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@ -1197,6 +1198,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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} else {
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/* set EVEX.L'L (vector length) */
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ins->evex_p[2] |= ((ins->vex_wlp << (5 - 2)) & EVEX_P2LL);
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ins->evex_p[1] |= ((ins->vex_wlp << (7 - 4)) & EVEX_P1W);
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if (opy->decoflags & BRDCAST_MASK) {
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/* set EVEX.b */
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ins->evex_p[2] |= EVEX_P2B;
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@ -2292,89 +2294,6 @@ static enum match_result matches(const struct itemplate *itemp,
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return MOK_GOOD;
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}
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/*
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* Check if offset is a multiple of N with corresponding tuple type
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* if Disp8*N is available, compressed displacement is stored in compdisp
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*/
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static bool is_disp8n(operand *input, insn *ins, int8_t *compdisp)
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{
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const uint8_t fv_n[2][2][VLMAX] = {{{16, 32, 64}, {4, 4, 4}},
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{{16, 32, 64}, {8, 8, 8}}};
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const uint8_t hv_n[2][VLMAX] = {{8, 16, 32}, {4, 4, 4}};
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const uint8_t dup_n[VLMAX] = {8, 32, 64};
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bool evex_b = input->decoflags & BRDCAST_MASK;
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enum ttypes tuple = ins->evex_tuple;
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/* vex_wlp composed as [wwllpp] */
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enum vectlens vectlen = (ins->vex_wlp & 0x0c) >> 2;
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/* wig(=2) is treated as w0(=0) */
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bool evex_w = (ins->vex_wlp & 0x10) >> 4;
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int32_t off = input->offset;
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uint8_t n = 0;
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int32_t disp8;
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switch(tuple) {
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case FV:
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n = fv_n[evex_w][evex_b][vectlen];
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break;
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case HV:
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n = hv_n[evex_b][vectlen];
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break;
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case FVM:
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/* 16, 32, 64 for VL 128, 256, 512 respectively*/
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n = 1 << (vectlen + 4);
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break;
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case T1S8: /* N = 1 */
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case T1S16: /* N = 2 */
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n = tuple - T1S8 + 1;
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break;
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case T1S:
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/* N = 4 for 32bit, 8 for 64bit */
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n = evex_w ? 8 : 4;
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break;
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case T1F32:
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case T1F64:
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/* N = 4 for 32bit, 8 for 64bit */
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n = (tuple == T1F32 ? 4 : 8);
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break;
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case T2:
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case T4:
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case T8:
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if (vectlen + 7 <= (evex_w + 5) + (tuple - T2 + 1))
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n = 0;
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else
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n = 1 << (tuple - T2 + evex_w + 3);
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break;
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case HVM:
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case QVM:
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case OVM:
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n = 1 << (OVM - tuple + vectlen + 1);
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break;
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case M128:
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n = 16;
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break;
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case DUP:
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n = dup_n[vectlen];
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break;
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default:
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break;
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}
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if (n && !(off & (n - 1))) {
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disp8 = off / n;
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/* if it fits in Disp8 */
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if (disp8 >= -128 && disp8 <= 127) {
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*compdisp = disp8;
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return true;
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}
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}
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*compdisp = 0;
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return false;
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}
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/*
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* Check if ModR/M.mod should/can be 01.
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* - EAF_BYTEOFFS is set
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71
disasm.c
71
disasm.c
@ -48,6 +48,7 @@
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#include "insns.h"
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#include "tables.h"
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#include "regdis.h"
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#include "disp8.h"
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/*
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* Flags that go into the `segment' field of `insn' structures
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@ -198,76 +199,6 @@ static enum reg_enum whichreg(opflags_t regflags, int regval, int rex)
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return 0;
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}
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/*
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* Find N value for compressed displacement (disp8 * N)
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*/
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static uint8_t get_disp8N(insn *ins)
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{
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const uint8_t fv_n[2][2][VLMAX] = {{{16, 32, 64}, {4, 4, 4}},
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{{16, 32, 64}, {8, 8, 8}}};
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const uint8_t hv_n[2][VLMAX] = {{8, 16, 32}, {4, 4, 4}};
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const uint8_t dup_n[VLMAX] = {8, 32, 64};
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bool evex_b = (ins->evex_p[2] & EVEX_P2B) >> 4;
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enum ttypes tuple = ins->evex_tuple;
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/* vex_wlp composed as [wwllpp] */
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enum vectlens vectlen = (ins->evex_p[2] & EVEX_P2LL) >> 5;
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/* wig(=2) is treated as w0(=0) */
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bool evex_w = (ins->evex_p[1] & EVEX_P1W) >> 7;
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uint8_t n = 0;
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switch(tuple) {
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case FV:
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n = fv_n[evex_w][evex_b][vectlen];
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break;
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case HV:
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n = hv_n[evex_b][vectlen];
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break;
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case FVM:
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/* 16, 32, 64 for VL 128, 256, 512 respectively*/
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n = 1 << (vectlen + 4);
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break;
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case T1S8: /* N = 1 */
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case T1S16: /* N = 2 */
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n = tuple - T1S8 + 1;
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break;
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case T1S:
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/* N = 4 for 32bit, 8 for 64bit */
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n = evex_w ? 8 : 4;
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break;
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case T1F32:
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case T1F64:
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/* N = 4 for 32bit, 8 for 64bit */
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n = (tuple == T1F32 ? 4 : 8);
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break;
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case T2:
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case T4:
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case T8:
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if (vectlen + 7 <= (evex_w + 5) + (tuple - T2 + 1))
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n = 0;
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else
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n = 1 << (tuple - T2 + evex_w + 3);
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break;
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case HVM:
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case QVM:
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case OVM:
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n = 1 << (OVM - tuple + vectlen + 1);
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break;
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case M128:
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n = 16;
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break;
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case DUP:
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n = dup_n[vectlen];
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break;
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default:
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break;
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}
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return n;
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}
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static uint32_t append_evex_reg_deco(char *buf, uint32_t num,
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decoflags_t deco, uint8_t *evex)
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{
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131
disp8.c
Normal file
131
disp8.c
Normal file
@ -0,0 +1,131 @@
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/* ----------------------------------------------------------------------- *
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*
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* Copyright 1996-2013 The NASM Authors - All Rights Reserved
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* See the file AUTHORS included with the NASM distribution for
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* the specific copyright holders.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following
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* conditions are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* ----------------------------------------------------------------------- */
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/*
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* disp8.c : Contains a common logic for EVEX compressed displacement
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*/
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#include "disp8.h"
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/*
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* Find N value for compressed displacement (disp8 * N)
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*/
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uint8_t get_disp8N(insn *ins)
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{
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const uint8_t fv_n[2][2][VLMAX] = {{{16, 32, 64}, {4, 4, 4}},
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{{16, 32, 64}, {8, 8, 8}}};
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const uint8_t hv_n[2][VLMAX] = {{8, 16, 32}, {4, 4, 4}};
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const uint8_t dup_n[VLMAX] = {8, 32, 64};
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bool evex_b = (ins->evex_p[2] & EVEX_P2B) >> 4;
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enum ttypes tuple = ins->evex_tuple;
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enum vectlens vectlen = (ins->evex_p[2] & EVEX_P2LL) >> 5;
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bool evex_w = (ins->evex_p[1] & EVEX_P1W) >> 7;
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uint8_t n = 0;
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switch(tuple) {
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case FV:
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n = fv_n[evex_w][evex_b][vectlen];
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break;
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case HV:
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n = hv_n[evex_b][vectlen];
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break;
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case FVM:
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/* 16, 32, 64 for VL 128, 256, 512 respectively*/
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n = 1 << (vectlen + 4);
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break;
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case T1S8: /* N = 1 */
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case T1S16: /* N = 2 */
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n = tuple - T1S8 + 1;
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break;
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case T1S:
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/* N = 4 for 32bit, 8 for 64bit */
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n = evex_w ? 8 : 4;
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break;
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case T1F32:
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case T1F64:
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/* N = 4 for 32bit, 8 for 64bit */
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n = (tuple == T1F32 ? 4 : 8);
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break;
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case T2:
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case T4:
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case T8:
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if (vectlen + 7 <= (evex_w + 5) + (tuple - T2 + 1))
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n = 0;
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else
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n = 1 << (tuple - T2 + evex_w + 3);
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break;
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case HVM:
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case QVM:
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case OVM:
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n = 1 << (OVM - tuple + vectlen + 1);
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break;
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case M128:
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n = 16;
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break;
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case DUP:
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n = dup_n[vectlen];
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break;
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default:
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break;
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}
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return n;
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}
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/*
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* Check if offset is a multiple of N with corresponding tuple type
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* if Disp8*N is available, compressed displacement is stored in compdisp
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*/
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bool is_disp8n(operand *input, insn *ins, int8_t *compdisp)
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{
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int32_t off = input->offset;
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uint8_t n;
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int32_t disp8;
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n = get_disp8N(ins);
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if (n && !(off & (n - 1))) {
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disp8 = off / n;
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/* if it fits in Disp8 */
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if (disp8 >= -128 && disp8 <= 127) {
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*compdisp = disp8;
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return true;
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}
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}
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*compdisp = 0;
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return false;
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}
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45
disp8.h
Normal file
45
disp8.h
Normal file
@ -0,0 +1,45 @@
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/* ----------------------------------------------------------------------- *
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*
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* Copyright 1996-2013 The NASM Authors - All Rights Reserved
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* See the file AUTHORS included with the NASM distribution for
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* the specific copyright holders.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following
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* conditions are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* ----------------------------------------------------------------------- */
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/*
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* disp8.h header file for disp8.c
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*/
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#ifndef NASM_DISP8_H
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#define NASM_DISP8_H
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#include "nasm.h"
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uint8_t get_disp8N(insn *ins);
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bool is_disp8n(operand *input, insn *ins, int8_t *compdisp);
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#endif /* NASM_DISP8_H */
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