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HLE: Move byte codes back to \271-\273
Since we are back to three bytecodes, move them back to the \271-\273 slot to free up the \264 complete quad. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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parent
e9d46c48e4
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19
assemble.c
19
assemble.c
@ -80,10 +80,6 @@
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* \254..\257 - a signed 32-bit operand to be extended to 64 bits.
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* \260..\263 - this instruction uses VEX/XOP rather than REX, with the
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* V field taken from operand 0..3.
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* \264 - skip this instruction pattern if HLE prefixes present
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* \265 - instruction takes XRELEASE (F3) with or without lock
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* \266 - instruction takes XACQUIRE/XRELEASE with or without lock
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* \267 - instruction takes XACQUIRE/XRELEASE with lock only
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* \270 - this instruction uses VEX/XOP rather than REX, with the
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* V field set to 1111b.
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*
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@ -101,6 +97,9 @@
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*
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* t = 0 for VEX (C4/C5), t = 1 for XOP (8F).
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*
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* \271 - instruction takes XRELEASE (F3) with or without lock
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* \272 - instruction takes XACQUIRE/XRELEASE with or without lock
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* \273 - instruction takes XACQUIRE/XRELEASE with lock only
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* \274..\277 - a signed byte immediate operand, from operand 0..3,
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* which is to be extended to the operand size.
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* \310 - indicates fixed 16-bit address size, i.e. optional 0x67.
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@ -981,12 +980,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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ins->vex_wlp = *codes++;
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break;
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case 0265:
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case 0266:
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case 0267:
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hleok = c & 3;
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break;
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case 0270:
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ins->rex |= REX_V;
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ins->vexreg = 0;
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@ -994,6 +987,12 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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ins->vex_wlp = *codes++;
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break;
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case 0271:
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case 0272:
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case 0273:
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hleok = c & 3;
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break;
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case4(0274):
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length++;
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break;
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6
disasm.c
6
disasm.c
@ -703,19 +703,19 @@ static int matches(const struct itemplate *t, uint8_t *data,
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break;
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}
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case 0265:
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case 0271:
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if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0266:
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case 0272:
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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else if (prefix->rep == 0xF3)
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drep = P_XRELEASE;
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break;
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case 0267:
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case 0273:
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if (prefix->lock == 0xF0) {
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if (prefix->rep == 0xF2)
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drep = P_XACQUIRE;
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6
insns.pl
6
insns.pl
@ -726,9 +726,9 @@ sub byte_code_compile($$) {
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'jcc8' => 0370, # Match only if Jcc possible with single byte
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'jmp8' => 0371, # Match only if JMP possible with single byte
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'jlen' => 0373, # Length of jump
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'hlexr' => 0265,
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'hlenl' => 0266,
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'hle' => 0267,
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'hlexr' => 0271,
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'hlenl' => 0272,
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'hle' => 0273,
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# This instruction takes XMM VSIB
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'vsibx' => 0374,
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'vm32x' => 0374,
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