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The AVX R,X,B, and V fields (but not W) are inverted.

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The AVX test cases are still not generated correctly, though.
This commit is contained in:
H. Peter Anvin 2008-05-04 23:15:13 -07:00
parent d85d250fa2
commit 4d2c38ce75
1 changed files with 4 additions and 4 deletions
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8
assemble.c
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@ -1616,15 +1616,15 @@ static void gencode(int32_t segment, int64_t offset, int bits,
codes += 2; codes += 2;
if (ins->vex_m != 1 || (ins->rex & (REX_W|REX_X|REX_B))) { if (ins->vex_m != 1 || (ins->rex & (REX_W|REX_X|REX_B))) {
bytes[0] = 0xc4; bytes[0] = 0xc4;
bytes[1] = ins->vex_m | ((ins->rex & 7) << 5); bytes[1] = ins->vex_m | ((~ins->rex & 7) << 5);
bytes[2] = ((ins->rex & REX_W) << (7-3)) | bytes[2] = ((ins->rex & REX_W) << (7-3)) |
(ins->drexdst << 3) | (ins->vex_wlp & 07); ((~ins->drexdst & 15)<< 3) | (ins->vex_wlp & 07);
out(offset, segment, &bytes, OUT_RAWDATA, 3, NO_SEG, NO_SEG); out(offset, segment, &bytes, OUT_RAWDATA, 3, NO_SEG, NO_SEG);
offset += 3; offset += 3;
} else { } else {
bytes[0] = 0xc5; bytes[0] = 0xc5;
bytes[1] = ((ins->rex & REX_R) << (7-2)) | bytes[1] = ((~ins->rex & REX_R) << (7-2)) |
(ins->drexdst << 3) | (ins->vex_wlp & 07); ((~ins->drexdst & 15) << 3) | (ins->vex_wlp & 07);
out(offset, segment, &bytes, OUT_RAWDATA, 2, NO_SEG, NO_SEG); out(offset, segment, &bytes, OUT_RAWDATA, 2, NO_SEG, NO_SEG);
offset += 2; offset += 2;
} }