mirror/nasm
2
0
Fork 0
mirror of https://github.com/netwide-assembler/nasm.git synced 2025-01-18 16:25:05 +08:00
Code Issues Packages Projects Releases Wiki Activity

assemble: add an OPT instruction flags for optimizing assembly only

Browse Source 
Add an OPT flag to only use a pattern for optimizing assembly only.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
H. Peter Anvin 2010-08-24 13:53:22 -07:00
parent 2d3dce2fd7
commit 47fb7bc088
2 changed files with 8 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
assemble.c
View File

@ -2045,6 +2045,12 @@ static enum match_result matches(const struct itemplate *itemp,
if (itemp->operands != instruction->operands)
return MERR_INVALOP;
/*
* Is it legal?
*/
if (!(optimizing > 0) && (itemp->flags & IF_OPT))
return MERR_INVALOP;
/*
* Check that no spurious colons or TOs are present
*/

3
insns.h
View File

@ -87,6 +87,7 @@ extern const uint8_t nasm_bytecodes[];
#define IF_AR4 0x00000140UL /* SB, SW, SD applies to argument 4 */
#define IF_ARMASK 0x000001C0UL /* mask for unsized argument spec */
#define IF_ARSHFT 6 /* LSB in IF_ARMASK */
#define IF_OPT 0x00000200UL /* optimizing assembly only */
/* The next 3 bits aren't actually used for anything */
#define IF_PRIV 0x00000000UL /* it's a privileged instruction */
#define IF_SMM 0x00000000UL /* it's only valid in SMM */
@ -111,7 +112,7 @@ extern const uint8_t nasm_bytecodes[];
#define IF_PMASK 0xFF000000UL /* the mask for processor types */
#define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */
/* also the highest possible processor */
#define IF_PFMASK 0xF01FFF00UL /* the mask for disassembly "prefer" */
#define IF_PFMASK 0xF01FF800UL /* the mask for disassembly "prefer" */
#define IF_8086 0x00000000UL /* 8086 instruction */
#define IF_186 0x01000000UL /* 186+ instruction */
#define IF_286 0x02000000UL /* 286+ instruction */