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mib: Handle MIB EA in a different way from regular EA's
In mib operands, users' intention should be preserved. e.g.) [eax + eax*1] and [eax*2] must be distinguished and encoded differently. So a new EA flag EAF_MIB for mib operands is added. And a new EA hint EAH_SUMMED for the case of [eax+eax*4] being parsed as [eax*5] is also added. NOSPLIT specifier does not have an effect in mib, so [nosplit eax + eax*1] will be encoded as [eax, eax] rather than [eax*2] as in a regular EA. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
This commit is contained in:
Jin Kyu Song
parent
478f2dafff
commit
4360ba28f0
85
assemble.c
85
assemble.c
@ -1231,27 +1231,18 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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}
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}
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/*
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* if a separate form of MIB (ICC style) is used,
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* the index reg info is merged into mem operand
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*/
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if (mib_index != R_none) {
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opy->indexreg = mib_index;
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opy->scale = 1;
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opy->hintbase = mib_index;
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opy->hinttype = EAH_NOTBASE;
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}
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/*
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* only for mib operands, make a single reg index [reg*1].
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* gas uses this form to explicitly denote index register.
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*/
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if (itemp_has(temp, IF_MIB) &&
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(opy->indexreg == -1 && opy->hintbase == opy->basereg &&
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opy->hinttype == EAH_NOTBASE)) {
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opy->indexreg = opy->basereg;
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opy->basereg = -1;
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opy->scale = 1;
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if (itemp_has(temp, IF_MIB)) {
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opy->eaflags |= EAF_MIB;
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/*
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* if a separate form of MIB (ICC style) is used,
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* the index reg info is merged into mem operand
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*/
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if (mib_index != R_none) {
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opy->indexreg = mib_index;
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opy->scale = 1;
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opy->hintbase = mib_index;
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opy->hinttype = EAH_NOTBASE;
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}
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}
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if (process_ea(opy, &ea_data, bits,
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@ -2379,6 +2370,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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{
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bool forw_ref = !!(input->opflags & OPFLAG_UNKNOWN);
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int addrbits = ins->addr_size;
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int eaflags = input->eaflags;
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output->type = EA_SCALAR;
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output->rip = false;
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@ -2434,8 +2426,8 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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input->type |= MEMORY;
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}
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if (input->eaflags & EAF_BYTEOFFS ||
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(input->eaflags & EAF_WORDOFFS &&
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if (eaflags & EAF_BYTEOFFS ||
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(eaflags & EAF_WORDOFFS &&
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input->disp_size != (addrbits != 16 ? 32 : 16))) {
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nasm_error(ERR_WARNING | ERR_PASS1, "displacement size ignored on absolute address");
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}
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@ -2556,7 +2548,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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base = (bt & 7);
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if (base != REG_NUM_EBP && o == 0 &&
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seg == NO_SEG && !forw_ref &&
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!(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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!(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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mod = 0;
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else if (IS_MOD_01())
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mod = 1;
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@ -2611,19 +2603,40 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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t = bt, bt = it, it = t;
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x = bx, bx = ix, ix = x;
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}
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if (bt == it) /* convert EAX+2*EAX to 3*EAX */
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bt = -1, bx = 0, s++;
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if (bt == -1 && s == 1 && !(hb == i && ht == EAH_NOTBASE)) {
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/* make single reg base, unless hint */
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bt = it, bx = ix, it = -1, ix = 0;
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}
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if (((s == 2 && it != REG_NUM_ESP && !(input->eaflags & EAF_TIMESTWO)) ||
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s == 3 || s == 5 || s == 9) && bt == -1)
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bt = it, bx = ix, s--; /* convert 3*EAX to EAX+2*EAX */
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if (it == -1 && (bt & 7) != REG_NUM_ESP &&
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(input->eaflags & EAF_TIMESTWO))
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it = bt, ix = bx, bt = -1, bx = 0, s = 1;
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/* convert [NOSPLIT EAX] to sib format with 0x0 displacement */
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if (eaflags & EAF_MIB) {
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/* only for mib operands */
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if (it == -1 && (hb == b && ht == EAH_NOTBASE)) {
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/*
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* make a single reg index [reg*1].
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* gas uses this form for an explicit index register.
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*/
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it = bt, ix = bx, bt = -1, bx = 0, s = 1;
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}
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if ((ht == EAH_SUMMED) && bt == -1) {
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/* separate once summed index into [base, index] */
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bt = it, bx = ix, s--;
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}
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} else {
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if (((s == 2 && it != REG_NUM_ESP &&
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!(eaflags & EAF_TIMESTWO)) ||
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s == 3 || s == 5 || s == 9) && bt == -1) {
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/* convert 3*EAX to EAX+2*EAX */
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bt = it, bx = ix, s--;
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}
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if (it == -1 && (bt & 7) != REG_NUM_ESP &&
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(eaflags & EAF_TIMESTWO)) {
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/*
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* convert [NOSPLIT EAX]
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* to sib format with 0x0 displacement - [EAX*1+0].
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*/
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it = bt, ix = bx, bt = -1, bx = 0, s = 1;
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}
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}
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if (s == 1 && it == REG_NUM_ESP) {
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/* swap ESP into base if scale is 1 */
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t = it, it = bt, bt = t;
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@ -2647,7 +2660,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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rm = (bt & 7);
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if (rm != REG_NUM_EBP && o == 0 &&
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seg == NO_SEG && !forw_ref &&
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!(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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!(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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mod = 0;
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else if (IS_MOD_01())
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mod = 1;
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@ -2691,7 +2704,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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base = (bt & 7);
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if (base != REG_NUM_EBP && o == 0 &&
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seg == NO_SEG && !forw_ref &&
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!(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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!(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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mod = 0;
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else if (IS_MOD_01())
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mod = 1;
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@ -2776,7 +2789,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits,
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goto err; /* so panic if it does */
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if (o == 0 && seg == NO_SEG && !forw_ref && rm != 6 &&
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!(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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!(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
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mod = 0;
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else if (IS_MOD_01())
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mod = 1;
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5
eval.c
5
eval.c
@ -148,8 +148,11 @@ static expr *add_vectors(expr * p, expr * q)
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lasttype = p++->type;
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} else { /* *p and *q have same type */
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int64_t sum = p->value + q->value;
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if (sum)
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if (sum) {
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addtotemp(p->type, sum);
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if (hint)
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hint->type = EAH_SUMMED;
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}
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lasttype = p->type;
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p++, q++;
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}
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6
nasm.h
6
nasm.h
@ -584,13 +584,15 @@ enum ea_flags { /* special EA flags */
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EAF_TIMESTWO = 4, /* really do EAX*2 not EAX+EAX */
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EAF_REL = 8, /* IP-relative addressing */
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EAF_ABS = 16, /* non-IP-relative addressing */
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EAF_FSGS = 32 /* fs/gs segment override present */
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EAF_FSGS = 32, /* fs/gs segment override present */
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EAF_MIB = 64, /* mib operand */
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};
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enum eval_hint { /* values for `hinttype' */
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EAH_NOHINT = 0, /* no hint at all - our discretion */
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EAH_MAKEBASE = 1, /* try to make given reg the base */
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EAH_NOTBASE = 2 /* try _not_ to make reg the base */
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EAH_NOTBASE = 2, /* try _not_ to make reg the base */
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EAH_SUMMED = 3, /* base and index are summed into index */
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};
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typedef struct operand { /* operand to an instruction */
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