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Add symbolic constants for REX_V "classes" (VEX, XOP, ...)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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parent
03b9f94133
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8
disasm.c
8
disasm.c
@ -1050,7 +1050,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
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prefix.vex[1] = *data++;
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prefix.rex = REX_V;
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prefix.vex_c = 0;
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prefix.vex_c = RV_VEX;
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if (prefix.vex[0] == 0xc4) {
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prefix.vex[2] = *data++;
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@ -1066,7 +1066,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
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prefix.vex_lp = prefix.vex[1] & 7;
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}
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ix = itable_vex[0][prefix.vex_m][prefix.vex_lp];
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ix = itable_vex[RV_VEX][prefix.vex_m][prefix.vex_lp];
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}
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end_prefix = true;
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break;
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@ -1079,7 +1079,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
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prefix.vex[2] = *data++;
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prefix.rex = REX_V;
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prefix.vex_c = 1;
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prefix.vex_c = RV_XOP;
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prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
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prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
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@ -1087,7 +1087,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
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prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
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prefix.vex_lp = prefix.vex[2] & 7;
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ix = itable_vex[1][prefix.vex_m][prefix.vex_lp];
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ix = itable_vex[RV_XOP][prefix.vex_m][prefix.vex_lp];
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}
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end_prefix = true;
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break;
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8
nasm.h
8
nasm.h
@ -601,6 +601,14 @@ enum ccode { /* condition code names */
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#define REX_OC 0x0200 /* DREX suffix has the OC0 bit set */
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#define REX_V 0x0400 /* Instruction uses VEX/XOP instead of REX */
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/*
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* REX_V "classes" (prefixes which behave like VEX)
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*/
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enum vex_class {
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RV_VEX = 0, /* C4/C5 */
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RV_XOP = 1 /* 8F */
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};
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/*
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* Note that because segment registers may be used as instruction
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* prefixes, we must ensure the enumerations for prefixes and
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