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JMP instructions use the operand size prefix, not the address size
prefix, to determine the size of the jump target.
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parent
01377d8d7c
commit
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12
CHANGES
12
CHANGES
@ -1,3 +1,15 @@
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0.98.33
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-------
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* New __NASM_PATCHLEVEL__ and __NASM_VERSION_ID__ standard macros to
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round out the version-query macros. version.pl now understands
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X.YYplWW or X.YY.ZZplWW as a version number, equivalent to
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X.YY.ZZ.WW (or X.YY.0.WW, as appropriate).
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* New keyword "strict" to disable the optimization of a specific
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operand.
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* Fix the handing of size overrides with JMP instructions
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(instructions such as "jmp dword foo".)
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0.98.32
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-------
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20
assemble.c
20
assemble.c
@ -28,7 +28,7 @@
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* \50, \51, \52 - a byte relative operand, from operand 0, 1 or 2
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* \60, \61, \62 - a word relative operand, from operand 0, 1 or 2
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* \64, \65, \66 - select between \6[012] and \7[012] depending on 16/32 bit
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* assembly mode or the address-size override on the operand
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* assembly mode or the operand-size override on the operand
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* \70, \71, \72 - a long relative operand, from operand 0, 1 or 2
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* \1ab - a ModRM, calculated on EA in operand a, with the spare
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* field the register value of operand b.
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@ -601,8 +601,11 @@ static long calcsize (long segment, long offset, int bits,
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case 060: case 061: case 062:
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length += 2; break;
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case 064: case 065: case 066:
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length += ((ins->oprs[c-064].addr_size ?
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ins->oprs[c-064].addr_size : bits) == 16 ? 2 : 4); break;
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if ( ins->oprs[c-064].type & (BITS16|BITS32) )
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length += (ins->oprs[c-064].type & BITS16) ? 2 : 4;
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else
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length += (bits == 16) ? 2 : 4;
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break;
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case 070: case 071: case 072:
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length += 4; break;
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case 0130: case 0131: case 0132:
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@ -849,14 +852,15 @@ static void gencode (long segment, long offset, int bits,
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break;
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case 064: case 065: case 066:
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size = ((ins->oprs[c-064].addr_size ?
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ins->oprs[c-064].addr_size : bits) == 16 ? 2 : 4);
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if ( ins->oprs[c-064].type & (BITS16|BITS32) )
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size = (ins->oprs[c-064].type & BITS16) ? 2 : 4;
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else
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size = (bits == 16) ? 2 : 4;
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if (ins->oprs[c-064].segment != segment) {
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long reltype = (size == 2 ? OUT_REL2ADR : OUT_REL4ADR);
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data = ins->oprs[c-064].offset;
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size = (bits == 16 ? OUT_REL2ADR : OUT_REL4ADR);
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out (offset, segment, &data, size+insn_end-offset,
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out (offset, segment, &data, reltype+insn_end-offset,
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ins->oprs[c-064].segment, ins->oprs[c-064].wrt);
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size = (bits == 16 ? 2 : 4);
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} else {
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data = ins->oprs[c-064].offset - insn_end;
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out (offset, segment, &data,
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9
disasm.c
9
disasm.c
@ -360,15 +360,18 @@ static int matches (struct itemplate *t, unsigned char *data, int asize,
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if (c >= 064 && c <= 066) {
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ins->oprs[c-064].offset = *data++;
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ins->oprs[c-064].offset |= (*data++ << 8);
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if (asize == 32) {
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if (osize == 32) {
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ins->oprs[c-064].offset |= (((long) *data++) << 16);
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ins->oprs[c-064].offset |= (((long) *data++) << 24);
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ins->oprs[c-064].segment |= SEG_32BIT;
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} else
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ins->oprs[c-064].segment &= ~SEG_32BIT;
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ins->oprs[c-064].segment |= SEG_RELATIVE;
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if (segsize != asize)
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ins->oprs[c-064].addr_size = asize;
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if (segsize != osize) {
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ins->oprs[c-064].type =
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(ins->oprs[c-064].type & NON_SIZE)
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| ((osize == 16) ? BITS16 : BITS32);
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}
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}
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if (c >= 070 && c <= 072) {
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ins->oprs[c-070].offset = *data++;
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