mirror of
https://github.com/netwide-assembler/nasm.git
synced 2025-03-31 18:20:22 +08:00
Removed unnecessary address size flags from register only versions of instructions
This commit is contained in:
Debbie Wiles
parent
af5bc55524
commit
0fde2f574e
236
insns.dat
236
insns.dat
@ -22,17 +22,17 @@ AAM void \2\xD4\x0A 8086
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AAM imm \1\xD4\24 8086,SB
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AAS void \1\x3F 8086
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ADC mem,reg8 \300\1\x10\101 8086,SM
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ADC reg8,reg8 \300\1\x10\101 8086
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ADC reg8,reg8 \1\x10\101 8086
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ADC mem,reg16 \320\300\1\x11\101 8086,SM
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ADC reg16,reg16 \320\300\1\x11\101 8086
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ADC reg16,reg16 \320\1\x11\101 8086
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ADC mem,reg32 \321\300\1\x11\101 386,SM
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ADC reg32,reg32 \321\300\1\x11\101 386
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ADC reg32,reg32 \321\1\x11\101 386
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ADC reg8,mem \301\1\x12\110 8086,SM
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ADC reg8,reg8 \301\1\x12\110 8086
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ADC reg8,reg8 \1\x12\110 8086
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ADC reg16,mem \320\301\1\x13\110 8086,SM
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ADC reg16,reg16 \320\301\1\x13\110 8086
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ADC reg16,reg16 \320\1\x13\110 8086
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ADC reg32,mem \321\301\1\x13\110 386,SM
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ADC reg32,reg32 \321\301\1\x13\110 386
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ADC reg32,reg32 \321\1\x13\110 386
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ADC rm16,imm8 \320\300\1\x83\202\15 8086
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ADC rm32,imm8 \321\300\1\x83\202\15 386
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ADC reg_al,imm \1\x14\21 8086,SM
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@ -47,17 +47,17 @@ ADC mem,imm8 \300\1\x80\202\21 8086,SM
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ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM
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ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM
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ADD mem,reg8 \300\17\101 8086,SM
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ADD reg8,reg8 \300\17\101 8086
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ADD reg8,reg8 \17\101 8086
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ADD mem,reg16 \320\300\1\x01\101 8086,SM
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ADD reg16,reg16 \320\300\1\x01\101 8086
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ADD reg16,reg16 \320\1\x01\101 8086
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ADD mem,reg32 \321\300\1\x01\101 386,SM
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ADD reg32,reg32 \321\300\1\x01\101 386
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ADD reg32,reg32 \321\1\x01\101 386
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ADD reg8,mem \301\1\x02\110 8086,SM
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ADD reg8,reg8 \301\1\x02\110 8086
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ADD reg8,reg8 \1\x02\110 8086
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ADD reg16,mem \320\301\1\x03\110 8086,SM
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ADD reg16,reg16 \320\301\1\x03\110 8086
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ADD reg16,reg16 \320\1\x03\110 8086
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ADD reg32,mem \321\301\1\x03\110 386,SM
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ADD reg32,reg32 \321\301\1\x03\110 386
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ADD reg32,reg32 \321\1\x03\110 386
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ADD rm16,imm8 \320\300\1\x83\200\15 8086
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ADD rm32,imm8 \321\300\1\x83\200\15 386
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ADD reg_al,imm \1\x04\21 8086,SM
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@ -72,17 +72,17 @@ ADD mem,imm8 \300\1\x80\200\21 8086,SM
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ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM
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ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM
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AND mem,reg8 \300\1\x20\101 8086,SM
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AND reg8,reg8 \300\1\x20\101 8086
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AND reg8,reg8 \1\x20\101 8086
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AND mem,reg16 \320\300\1\x21\101 8086,SM
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AND reg16,reg16 \320\300\1\x21\101 8086
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AND reg16,reg16 \320\1\x21\101 8086
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AND mem,reg32 \321\300\1\x21\101 386,SM
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AND reg32,reg32 \321\300\1\x21\101 386
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AND reg32,reg32 \321\1\x21\101 386
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AND reg8,mem \301\1\x22\110 8086,SM
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AND reg8,reg8 \301\1\x22\110 8086
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AND reg8,reg8 \1\x22\110 8086
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AND reg16,mem \320\301\1\x23\110 8086,SM
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AND reg16,reg16 \320\301\1\x23\110 8086
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AND reg16,reg16 \320\1\x23\110 8086
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AND reg32,mem \321\301\1\x23\110 386,SM
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AND reg32,reg32 \321\301\1\x23\110 386
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AND reg32,reg32 \321\1\x23\110 386
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AND rm16,imm8 \320\300\1\x83\204\15 8086
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AND rm32,imm8 \321\300\1\x83\204\15 386
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AND reg_al,imm \1\x24\21 8086,SM
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@ -97,40 +97,40 @@ AND mem,imm8 \300\1\x80\204\21 8086,SM
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AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM
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AND mem,imm32 \321\300\144\1\x81\204\141 386,SM
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ARPL mem,reg16 \300\1\x63\101 286,PROT,SM
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ARPL reg16,reg16 \300\1\x63\101 286,PROT
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ARPL reg16,reg16 \1\x63\101 286,PROT
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BOUND reg16,mem \320\301\1\x62\110 186
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BOUND reg32,mem \321\301\1\x62\110 386
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BSF reg16,mem \320\301\2\x0F\xBC\110 386,SM
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BSF reg16,reg16 \320\301\2\x0F\xBC\110 386
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BSF reg16,reg16 \320\2\x0F\xBC\110 386
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BSF reg32,mem \321\301\2\x0F\xBC\110 386,SM
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BSF reg32,reg32 \321\301\2\x0F\xBC\110 386
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BSF reg32,reg32 \321\2\x0F\xBC\110 386
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BSR reg16,mem \320\301\2\x0F\xBD\110 386,SM
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BSR reg16,reg16 \320\301\2\x0F\xBD\110 386
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BSR reg16,reg16 \320\2\x0F\xBD\110 386
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BSR reg32,mem \321\301\2\x0F\xBD\110 386,SM
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BSR reg32,reg32 \321\301\2\x0F\xBD\110 386
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BSR reg32,reg32 \321\2\x0F\xBD\110 386
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BSWAP reg32 \321\1\x0F\10\xC8 486
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BT mem,reg16 \320\300\2\x0F\xA3\101 386,SM
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BT reg16,reg16 \320\300\2\x0F\xA3\101 386
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BT reg16,reg16 \320\2\x0F\xA3\101 386
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BT mem,reg32 \321\300\2\x0F\xA3\101 386,SM
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BT reg32,reg32 \321\300\2\x0F\xA3\101 386
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BT reg32,reg32 \321\2\x0F\xA3\101 386
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BT rm16,imm \320\300\2\x0F\xBA\204\25 386,SB
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BT rm32,imm \321\300\2\x0F\xBA\204\25 386,SB
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BTC mem,reg16 \320\300\2\x0F\xBB\101 386,SM
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BTC reg16,reg16 \320\300\2\x0F\xBB\101 386
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BTC reg16,reg16 \320\2\x0F\xBB\101 386
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BTC mem,reg32 \321\300\2\x0F\xBB\101 386,SM
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BTC reg32,reg32 \321\300\2\x0F\xBB\101 386
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BTC reg32,reg32 \321\2\x0F\xBB\101 386
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BTC rm16,imm \320\300\2\x0F\xBA\207\25 386,SB
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BTC rm32,imm \321\300\2\x0F\xBA\207\25 386,SB
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BTR mem,reg16 \320\300\2\x0F\xB3\101 386,SM
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BTR reg16,reg16 \320\300\2\x0F\xB3\101 386
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BTR reg16,reg16 \320\2\x0F\xB3\101 386
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BTR mem,reg32 \321\300\2\x0F\xB3\101 386,SM
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BTR reg32,reg32 \321\300\2\x0F\xB3\101 386
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BTR reg32,reg32 \321\2\x0F\xB3\101 386
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BTR rm16,imm \320\300\2\x0F\xBA\206\25 386,SB
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BTR rm32,imm \321\300\2\x0F\xBA\206\25 386,SB
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BTS mem,reg16 \320\300\2\x0F\xAB\101 386,SM
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BTS reg16,reg16 \320\300\2\x0F\xAB\101 386
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BTS reg16,reg16 \320\2\x0F\xAB\101 386
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BTS mem,reg32 \321\300\2\x0F\xAB\101 386,SM
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BTS reg32,reg32 \321\300\2\x0F\xAB\101 386
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BTS reg32,reg32 \321\2\x0F\xAB\101 386
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BTS rm16,imm \320\300\2\x0F\xBA\205\25 386,SB
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BTS rm32,imm \321\300\2\x0F\xBA\205\25 386,SB
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CALL imm \322\1\xE8\64 8086
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@ -166,17 +166,17 @@ CLI void \1\xFA 8086
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CLTS void \2\x0F\x06 286,PRIV
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CMC void \1\xF5 8086
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CMP mem,reg8 \300\1\x38\101 8086,SM
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CMP reg8,reg8 \300\1\x38\101 8086
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CMP reg8,reg8 \1\x38\101 8086
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CMP mem,reg16 \320\300\1\x39\101 8086,SM
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CMP reg16,reg16 \320\300\1\x39\101 8086
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CMP reg16,reg16 \320\1\x39\101 8086
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CMP mem,reg32 \321\300\1\x39\101 386,SM
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CMP reg32,reg32 \321\300\1\x39\101 386
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CMP reg32,reg32 \321\1\x39\101 386
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CMP reg8,mem \301\1\x3A\110 8086,SM
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CMP reg8,reg8 \301\1\x3A\110 8086
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CMP reg8,reg8 \1\x3A\110 8086
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CMP reg16,mem \320\301\1\x3B\110 8086,SM
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CMP reg16,reg16 \320\301\1\x3B\110 8086
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CMP reg16,reg16 \320\1\x3B\110 8086
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CMP reg32,mem \321\301\1\x3B\110 386,SM
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CMP reg32,reg32 \321\301\1\x3B\110 386
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CMP reg32,reg32 \321\1\x3B\110 386
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CMP rm16,imm8 \320\300\1\x83\207\15 8086
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CMP rm32,imm8 \321\300\1\x83\207\15 386
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CMP reg_al,imm \1\x3C\21 8086,SM
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@ -194,17 +194,17 @@ CMPSB void \332\1\xA6 8086
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CMPSD void \332\321\1\xA7 386
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CMPSW void \332\320\1\xA7 8086
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CMPXCHG mem,reg8 \300\2\x0F\xB0\101 PENT,SM
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CMPXCHG reg8,reg8 \300\2\x0F\xB0\101 PENT
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CMPXCHG reg8,reg8 \2\x0F\xB0\101 PENT
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CMPXCHG mem,reg16 \320\300\2\x0F\xB1\101 PENT,SM
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CMPXCHG reg16,reg16 \320\300\2\x0F\xB1\101 PENT
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CMPXCHG reg16,reg16 \320\2\x0F\xB1\101 PENT
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CMPXCHG mem,reg32 \321\300\2\x0F\xB1\101 PENT,SM
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CMPXCHG reg32,reg32 \321\300\2\x0F\xB1\101 PENT
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CMPXCHG reg32,reg32 \321\2\x0F\xB1\101 PENT
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CMPXCHG486 mem,reg8 \300\2\x0F\xA6\101 486,SM,UNDOC
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CMPXCHG486 reg8,reg8 \300\2\x0F\xA6\101 486,UNDOC
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CMPXCHG486 reg8,reg8 \2\x0F\xA6\101 486,UNDOC
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CMPXCHG486 mem,reg16 \320\300\2\x0F\xA7\101 486,SM,UNDOC
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CMPXCHG486 reg16,reg16 \320\300\2\x0F\xA7\101 486,UNDOC
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CMPXCHG486 reg16,reg16 \320\2\x0F\xA7\101 486,UNDOC
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CMPXCHG486 mem,reg32 \321\300\2\x0F\xA7\101 486,SM,UNDOC
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CMPXCHG486 reg32,reg32 \321\300\2\x0F\xA7\101 486,UNDOC
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CMPXCHG486 reg32,reg32 \321\2\x0F\xA7\101 486,UNDOC
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CMPXCHG8B mem \300\2\x0F\xC7\201 PENT
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CPUID void \2\x0F\xA2 PENT
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CWD void \320\1\x99 8086
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@ -412,9 +412,9 @@ FYL2X void \2\xD9\xF1 8086,FPU
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FYL2XP1 void \2\xD9\xF9 8086,FPU
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HLT void \1\xF4 8086,PRIV
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IBTS mem,reg16 \320\300\2\x0F\xA7\101 386,SW,UNDOC,ND
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IBTS reg16,reg16 \320\300\2\x0F\xA7\101 386,UNDOC,ND
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IBTS reg16,reg16 \320\2\x0F\xA7\101 386,UNDOC,ND
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IBTS mem,reg32 \321\300\2\x0F\xA7\101 386,SD,UNDOC,ND
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IBTS reg32,reg32 \321\300\2\x0F\xA7\101 386,UNDOC,ND
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IBTS reg32,reg32 \321\2\x0F\xA7\101 386,UNDOC,ND
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ICEBP void \1\xF1 386,ND
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IDIV rm8 \300\1\xF6\207 8086
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IDIV rm16 \320\300\1\xF7\207 8086
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@ -512,9 +512,9 @@ JMPE rm16 \320\2\x0F\x00\206 IA64
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JMPE rm32 \321\2\x0F\x00\206 IA64
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LAHF void \1\x9F 8086
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LAR reg16,mem \320\301\2\x0F\x02\110 286,PROT,SM
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LAR reg16,reg16 \320\301\2\x0F\x02\110 286,PROT
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LAR reg16,reg16 \320\2\x0F\x02\110 286,PROT
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LAR reg32,mem \321\301\2\x0F\x02\110 386,PROT,SM
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LAR reg32,reg32 \321\301\2\x0F\x02\110 386,PROT
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LAR reg32,reg32 \321\2\x0F\x02\110 386,PROT
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LDS reg16,mem \320\301\1\xC5\110 8086
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LDS reg32,mem \321\301\1\xC5\110 386
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LEA reg16,mem \320\301\1\x8D\110 8086
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@ -530,10 +530,10 @@ LGS reg32,mem \321\301\2\x0F\xB5\110 386
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LIDT mem \300\2\x0F\x01\203 286,PRIV
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LLDT mem \300\1\x0F\17\202 286,PROT,PRIV
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LLDT mem16 \300\1\x0F\17\202 286,PROT,PRIV
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LLDT reg16 \300\1\x0F\17\202 286,PROT,PRIV
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LLDT reg16 \1\x0F\17\202 286,PROT,PRIV
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LMSW mem \300\2\x0F\x01\206 286,PRIV
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LMSW mem16 \300\2\x0F\x01\206 286,PRIV
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LMSW reg16 \300\2\x0F\x01\206 286,PRIV
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LMSW reg16 \2\x0F\x01\206 286,PRIV
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LOADALL void \2\x0F\x07 386,UNDOC
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LOADALL286 void \2\x0F\x05 286,UNDOC
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LODSB void \1\xAC 8086
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@ -555,9 +555,9 @@ LOOPZ imm \312\1\xE1\50 8086
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LOOPZ imm,reg_cx \310\1\xE1\50 8086
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LOOPZ imm,reg_ecx \311\1\xE1\50 386
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LSL reg16,mem \320\301\2\x0F\x03\110 286,PROT,SM
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LSL reg16,reg16 \320\301\2\x0F\x03\110 286,PROT
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LSL reg16,reg16 \320\2\x0F\x03\110 286,PROT
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LSL reg32,mem \321\301\2\x0F\x03\110 386,PROT,SM
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LSL reg32,reg32 \321\301\2\x0F\x03\110 386,PROT
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LSL reg32,reg32 \321\2\x0F\x03\110 386,PROT
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LSS reg16,mem \320\301\2\x0F\xB2\110 386
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LSS reg32,mem \321\301\2\x0F\xB2\110 386
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LTR mem \300\1\x0F\17\203 286,PROT,PRIV
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@ -582,17 +582,17 @@ MOV reg_creg,reg32 \2\x0F\x22\110 386,PRIV
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MOV reg_dreg,reg32 \2\x0F\x23\110 386,PRIV
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MOV reg_treg,reg32 \2\x0F\x26\110 386,PRIV
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MOV mem,reg8 \300\1\x88\101 8086,SM
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MOV reg8,reg8 \300\1\x88\101 8086
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MOV reg8,reg8 \1\x88\101 8086
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MOV mem,reg16 \320\300\1\x89\101 8086,SM
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MOV reg16,reg16 \320\300\1\x89\101 8086
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MOV reg16,reg16 \320\1\x89\101 8086
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MOV mem,reg32 \321\300\1\x89\101 386,SM
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MOV reg32,reg32 \321\300\1\x89\101 386
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MOV reg32,reg32 \321\1\x89\101 386
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MOV reg8,mem \301\1\x8A\110 8086,SM
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MOV reg8,reg8 \301\1\x8A\110 8086
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MOV reg8,reg8 \1\x8A\110 8086
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MOV reg16,mem \320\301\1\x8B\110 8086,SM
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MOV reg16,reg16 \320\301\1\x8B\110 8086
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MOV reg16,reg16 \320\1\x8B\110 8086
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MOV reg32,mem \321\301\1\x8B\110 386,SM
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MOV reg32,reg32 \321\301\1\x8B\110 386
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MOV reg32,reg32 \321\1\x8B\110 386
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MOV reg8,imm \10\xB0\21 8086,SM
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MOV reg16,imm \320\10\xB8\31 8086,SM
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MOV reg32,imm \321\10\xB8\41 386,SM
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@ -614,11 +614,11 @@ MOVSB void \1\xA4 8086
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MOVSD void \321\1\xA5 386
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MOVSW void \320\1\xA5 8086
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MOVSX reg16,mem \320\301\2\x0F\xBE\110 386,SB
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MOVSX reg16,reg8 \320\301\2\x0F\xBE\110 386
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MOVSX reg16,reg8 \320\2\x0F\xBE\110 386
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MOVSX reg32,rm8 \321\301\2\x0F\xBE\110 386
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MOVSX reg32,rm16 \321\301\2\x0F\xBF\110 386
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MOVZX reg16,mem \320\301\2\x0F\xB6\110 386,SB
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MOVZX reg16,reg8 \320\301\2\x0F\xB6\110 386
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MOVZX reg16,reg8 \320\2\x0F\xB6\110 386
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MOVZX reg32,rm8 \321\301\2\x0F\xB6\110 386
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MOVZX reg32,rm16 \321\301\2\x0F\xB7\110 386
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MUL rm8 \300\1\xF6\204 8086
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@ -632,17 +632,17 @@ NOT rm8 \300\1\xF6\202 8086
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NOT rm16 \320\300\1\xF7\202 8086
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NOT rm32 \321\300\1\xF7\202 386
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OR mem,reg8 \300\1\x08\101 8086,SM
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OR reg8,reg8 \300\1\x08\101 8086
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OR reg8,reg8 \1\x08\101 8086
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OR mem,reg16 \320\300\1\x09\101 8086,SM
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OR reg16,reg16 \320\300\1\x09\101 8086
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OR reg16,reg16 \320\1\x09\101 8086
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OR mem,reg32 \321\300\1\x09\101 386,SM
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OR reg32,reg32 \321\300\1\x09\101 386
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||||
OR reg32,reg32 \321\1\x09\101 386
|
||||
OR reg8,mem \301\1\x0A\110 8086,SM
|
||||
OR reg8,reg8 \301\1\x0A\110 8086
|
||||
OR reg8,reg8 \1\x0A\110 8086
|
||||
OR reg16,mem \320\301\1\x0B\110 8086,SM
|
||||
OR reg16,reg16 \320\301\1\x0B\110 8086
|
||||
OR reg16,reg16 \320\1\x0B\110 8086
|
||||
OR reg32,mem \321\301\1\x0B\110 386,SM
|
||||
OR reg32,reg32 \321\301\1\x0B\110 386
|
||||
OR reg32,reg32 \321\1\x0B\110 386
|
||||
OR rm16,imm8 \320\300\1\x83\201\15 8086
|
||||
OR rm32,imm8 \321\300\1\x83\201\15 386
|
||||
OR reg_al,imm \1\x0C\21 8086,SM
|
||||
@ -926,17 +926,17 @@ SAR rm32,unity \321\300\1\xD1\207 386
|
||||
SAR rm32,reg_cl \321\300\1\xD3\207 386
|
||||
SAR rm32,imm \321\300\1\xC1\207\25 386,SB
|
||||
SBB mem,reg8 \300\1\x18\101 8086,SM
|
||||
SBB reg8,reg8 \300\1\x18\101 8086
|
||||
SBB reg8,reg8 \1\x18\101 8086
|
||||
SBB mem,reg16 \320\300\1\x19\101 8086,SM
|
||||
SBB reg16,reg16 \320\300\1\x19\101 8086
|
||||
SBB reg16,reg16 \320\1\x19\101 8086
|
||||
SBB mem,reg32 \321\300\1\x19\101 386,SM
|
||||
SBB reg32,reg32 \321\300\1\x19\101 386
|
||||
SBB reg32,reg32 \321\1\x19\101 386
|
||||
SBB reg8,mem \301\1\x1A\110 8086,SM
|
||||
SBB reg8,reg8 \301\1\x1A\110 8086
|
||||
SBB reg8,reg8 \1\x1A\110 8086
|
||||
SBB reg16,mem \320\301\1\x1B\110 8086,SM
|
||||
SBB reg16,reg16 \320\301\1\x1B\110 8086
|
||||
SBB reg16,reg16 \320\1\x1B\110 8086
|
||||
SBB reg32,mem \321\301\1\x1B\110 386,SM
|
||||
SBB reg32,reg32 \321\301\1\x1B\110 386
|
||||
SBB reg32,reg32 \321\1\x1B\110 386
|
||||
SBB rm16,imm8 \320\300\1\x83\203\15 8086
|
||||
SBB rm32,imm8 \321\300\1\x83\203\15 386
|
||||
SBB reg_al,imm \1\x1C\21 8086,SM
|
||||
@ -964,13 +964,13 @@ SHL rm32,unity \321\300\1\xD1\204 386
|
||||
SHL rm32,reg_cl \321\300\1\xD3\204 386
|
||||
SHL rm32,imm \321\300\1\xC1\204\25 386,SB
|
||||
SHLD mem,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD reg16,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD reg16,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD mem,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD reg32,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD reg32,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
||||
SHLD mem,reg16,reg_cl \300\320\2\x0F\xA5\101 386,SM
|
||||
SHLD reg16,reg16,reg_cl \300\320\2\x0F\xA5\101 386
|
||||
SHLD reg16,reg16,reg_cl \320\2\x0F\xA5\101 386
|
||||
SHLD mem,reg32,reg_cl \300\321\2\x0F\xA5\101 386,SM
|
||||
SHLD reg32,reg32,reg_cl \300\321\2\x0F\xA5\101 386
|
||||
SHLD reg32,reg32,reg_cl \321\2\x0F\xA5\101 386
|
||||
SHR rm8,unity \300\1\xD0\205 8086
|
||||
SHR rm8,reg_cl \300\1\xD2\205 8086
|
||||
SHR rm8,imm \300\1\xC0\205\25 186,SB
|
||||
@ -981,24 +981,24 @@ SHR rm32,unity \321\300\1\xD1\205 386
|
||||
SHR rm32,reg_cl \321\300\1\xD3\205 386
|
||||
SHR rm32,imm \321\300\1\xC1\205\25 386,SB
|
||||
SHRD mem,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD reg16,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD reg16,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD mem,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD reg32,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD reg32,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
||||
SHRD mem,reg16,reg_cl \300\320\2\x0F\xAD\101 386,SM
|
||||
SHRD reg16,reg16,reg_cl \300\320\2\x0F\xAD\101 386
|
||||
SHRD reg16,reg16,reg_cl \320\2\x0F\xAD\101 386
|
||||
SHRD mem,reg32,reg_cl \300\321\2\x0F\xAD\101 386,SM
|
||||
SHRD reg32,reg32,reg_cl \300\321\2\x0F\xAD\101 386
|
||||
SHRD reg32,reg32,reg_cl \321\2\x0F\xAD\101 386
|
||||
SIDT mem \300\2\x0F\x01\201 286
|
||||
SLDT mem \300\1\x0F\17\200 286
|
||||
SLDT mem16 \300\1\x0F\17\200 286
|
||||
SLDT reg16 \300\1\x0F\17\200 286
|
||||
SLDT reg16 \1\x0F\17\200 286
|
||||
SMI void \1\xF1 386,UNDOC
|
||||
SMINT void \2\x0F\x38 P6,CYRIX
|
||||
; Older Cyrix chips had this; they had to move due to conflict with MMX
|
||||
SMINTOLD void \2\x0F\x7E 486,CYRIX,ND
|
||||
SMSW mem \300\2\x0F\x01\204 286
|
||||
SMSW mem16 \300\2\x0F\x01\204 286
|
||||
SMSW reg16 \300\2\x0F\x01\204 286
|
||||
SMSW reg16 \2\x0F\x01\204 286
|
||||
STC void \1\xF9 8086
|
||||
STD void \1\xFD 8086
|
||||
STI void \1\xFB 8086
|
||||
@ -1007,19 +1007,19 @@ STOSD void \321\1\xAB 386
|
||||
STOSW void \320\1\xAB 8086
|
||||
STR mem \300\1\x0F\17\201 286,PROT
|
||||
STR mem16 \300\1\x0F\17\201 286,PROT
|
||||
STR reg16 \300\1\x0F\17\201 286,PROT
|
||||
STR reg16 \1\x0F\17\201 286,PROT
|
||||
SUB mem,reg8 \300\1\x28\101 8086,SM
|
||||
SUB reg8,reg8 \300\1\x28\101 8086
|
||||
SUB reg8,reg8 \1\x28\101 8086
|
||||
SUB mem,reg16 \320\300\1\x29\101 8086,SM
|
||||
SUB reg16,reg16 \320\300\1\x29\101 8086
|
||||
SUB reg16,reg16 \320\1\x29\101 8086
|
||||
SUB mem,reg32 \321\300\1\x29\101 386,SM
|
||||
SUB reg32,reg32 \321\300\1\x29\101 386
|
||||
SUB reg32,reg32 \321\1\x29\101 386
|
||||
SUB reg8,mem \301\1\x2A\110 8086,SM
|
||||
SUB reg8,reg8 \301\1\x2A\110 8086
|
||||
SUB reg8,reg8 \1\x2A\110 8086
|
||||
SUB reg16,mem \320\301\1\x2B\110 8086,SM
|
||||
SUB reg16,reg16 \320\301\1\x2B\110 8086
|
||||
SUB reg16,reg16 \320\1\x2B\110 8086
|
||||
SUB reg32,mem \321\301\1\x2B\110 386,SM
|
||||
SUB reg32,reg32 \321\301\1\x2B\110 386
|
||||
SUB reg32,reg32 \321\1\x2B\110 386
|
||||
SUB rm16,imm8 \320\300\1\x83\205\15 8086
|
||||
SUB rm32,imm8 \321\300\1\x83\205\15 386
|
||||
SUB reg_al,imm \1\x2C\21 8086,SM
|
||||
@ -1041,11 +1041,11 @@ SYSENTER void \2\x0F\x34 P6
|
||||
SYSEXIT void \2\x0F\x36 P6,PRIV
|
||||
SYSRET void \2\x0F\x07 P6,PRIV,AMD
|
||||
TEST mem,reg8 \300\1\x84\101 8086,SM
|
||||
TEST reg8,reg8 \300\1\x84\101 8086
|
||||
TEST reg8,reg8 \1\x84\101 8086
|
||||
TEST mem,reg16 \320\300\1\x85\101 8086,SM
|
||||
TEST reg16,reg16 \320\300\1\x85\101 8086
|
||||
TEST reg16,reg16 \320\1\x85\101 8086
|
||||
TEST mem,reg32 \321\300\1\x85\101 386,SM
|
||||
TEST reg32,reg32 \321\300\1\x85\101 386
|
||||
TEST reg32,reg32 \321\1\x85\101 386
|
||||
TEST reg8,mem \301\1\x84\110 8086,SM
|
||||
TEST reg16,mem \320\301\1\x85\110 8086,SM
|
||||
TEST reg32,mem \321\301\1\x85\110 386,SM
|
||||
@ -1062,68 +1062,68 @@ UD0 void \2\x0F\xFF 286,UNDOC
|
||||
UD1 void \2\x0F\xB9 286,UNDOC
|
||||
UD2 void \2\x0F\x0B 286
|
||||
UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM
|
||||
UMOV reg8,reg8 \300\2\x0F\x10\101 386,UNDOC
|
||||
UMOV reg8,reg8 \2\x0F\x10\101 386,UNDOC
|
||||
UMOV mem,reg16 \320\300\2\x0F\x11\101 386,UNDOC,SM
|
||||
UMOV reg16,reg16 \320\300\2\x0F\x11\101 386,UNDOC
|
||||
UMOV reg16,reg16 \320\2\x0F\x11\101 386,UNDOC
|
||||
UMOV mem,reg32 \321\300\2\x0F\x11\101 386,UNDOC,SM
|
||||
UMOV reg32,reg32 \321\300\2\x0F\x11\101 386,UNDOC
|
||||
UMOV reg32,reg32 \321\2\x0F\x11\101 386,UNDOC
|
||||
UMOV reg8,mem \301\2\x0F\x12\110 386,UNDOC,SM
|
||||
UMOV reg8,reg8 \301\2\x0F\x12\110 386,UNDOC
|
||||
UMOV reg8,reg8 \2\x0F\x12\110 386,UNDOC
|
||||
UMOV reg16,mem \320\301\2\x0F\x13\110 386,UNDOC,SM
|
||||
UMOV reg16,reg16 \320\301\2\x0F\x13\110 386,UNDOC
|
||||
UMOV reg16,reg16 \320\2\x0F\x13\110 386,UNDOC
|
||||
UMOV reg32,mem \321\301\2\x0F\x13\110 386,UNDOC,SM
|
||||
UMOV reg32,reg32 \321\301\2\x0F\x13\110 386,UNDOC
|
||||
UMOV reg32,reg32 \321\2\x0F\x13\110 386,UNDOC
|
||||
VERR mem \300\1\x0F\17\204 286,PROT
|
||||
VERR mem16 \300\1\x0F\17\204 286,PROT
|
||||
VERR reg16 \300\1\x0F\17\204 286,PROT
|
||||
VERR reg16 \1\x0F\17\204 286,PROT
|
||||
VERW mem \300\1\x0F\17\205 286,PROT
|
||||
VERW mem16 \300\1\x0F\17\205 286,PROT
|
||||
VERW reg16 \300\1\x0F\17\205 286,PROT
|
||||
VERW reg16 \1\x0F\17\205 286,PROT
|
||||
WAIT void \1\x9B 8086
|
||||
FWAIT void \1\x9B 8086
|
||||
WBINVD void \2\x0F\x09 486,PRIV
|
||||
WRSHR rm32 \321\300\2\x0F\x37\200 P6,CYRIX,SMM
|
||||
WRMSR void \2\x0F\x30 PENT,PRIV
|
||||
XADD mem,reg8 \300\2\x0F\xC0\101 486,SM
|
||||
XADD reg8,reg8 \300\2\x0F\xC0\101 486
|
||||
XADD reg8,reg8 \2\x0F\xC0\101 486
|
||||
XADD mem,reg16 \320\300\2\x0F\xC1\101 486,SM
|
||||
XADD reg16,reg16 \320\300\2\x0F\xC1\101 486
|
||||
XADD reg16,reg16 \320\2\x0F\xC1\101 486
|
||||
XADD mem,reg32 \321\300\2\x0F\xC1\101 486,SM
|
||||
XADD reg32,reg32 \321\300\2\x0F\xC1\101 486
|
||||
XADD reg32,reg32 \321\2\x0F\xC1\101 486
|
||||
XBTS reg16,mem \320\301\2\x0F\xA6\110 386,SW,UNDOC,ND
|
||||
XBTS reg16,reg16 \320\301\2\x0F\xA6\110 386,UNDOC,ND
|
||||
XBTS reg16,reg16 \320\2\x0F\xA6\110 386,UNDOC,ND
|
||||
XBTS reg32,mem \321\301\2\x0F\xA6\110 386,SD,UNDOC,ND
|
||||
XBTS reg32,reg32 \321\301\2\x0F\xA6\110 386,UNDOC,ND
|
||||
XBTS reg32,reg32 \321\2\x0F\xA6\110 386,UNDOC,ND
|
||||
XCHG reg_ax,reg16 \320\11\x90 8086
|
||||
XCHG reg_eax,reg32 \321\11\x90 386
|
||||
XCHG reg16,reg_ax \320\10\x90 8086
|
||||
XCHG reg32,reg_eax \321\10\x90 386
|
||||
XCHG reg8,mem \301\1\x86\110 8086,SM
|
||||
XCHG reg8,reg8 \301\1\x86\110 8086
|
||||
XCHG reg8,reg8 \1\x86\110 8086
|
||||
XCHG reg16,mem \320\301\1\x87\110 8086,SM
|
||||
XCHG reg16,reg16 \320\301\1\x87\110 8086
|
||||
XCHG reg16,reg16 \320\1\x87\110 8086
|
||||
XCHG reg32,mem \321\301\1\x87\110 386,SM
|
||||
XCHG reg32,reg32 \321\301\1\x87\110 386
|
||||
XCHG reg32,reg32 \321\1\x87\110 386
|
||||
XCHG mem,reg8 \300\1\x86\101 8086,SM
|
||||
XCHG reg8,reg8 \300\1\x86\101 8086
|
||||
XCHG reg8,reg8 \1\x86\101 8086
|
||||
XCHG mem,reg16 \320\300\1\x87\101 8086,SM
|
||||
XCHG reg16,reg16 \320\300\1\x87\101 8086
|
||||
XCHG reg16,reg16 \320\1\x87\101 8086
|
||||
XCHG mem,reg32 \321\300\1\x87\101 386,SM
|
||||
XCHG reg32,reg32 \321\300\1\x87\101 386
|
||||
XCHG reg32,reg32 \321\1\x87\101 386
|
||||
XLATB void \1\xD7 8086
|
||||
XLAT void \1\xD7 8086
|
||||
XOR mem,reg8 \300\1\x30\101 8086,SM
|
||||
XOR reg8,reg8 \300\1\x30\101 8086
|
||||
XOR reg8,reg8 \1\x30\101 8086
|
||||
XOR mem,reg16 \320\300\1\x31\101 8086,SM
|
||||
XOR reg16,reg16 \320\300\1\x31\101 8086
|
||||
XOR reg16,reg16 \320\1\x31\101 8086
|
||||
XOR mem,reg32 \321\300\1\x31\101 386,SM
|
||||
XOR reg32,reg32 \321\300\1\x31\101 386
|
||||
XOR reg32,reg32 \321\1\x31\101 386
|
||||
XOR reg8,mem \301\1\x32\110 8086,SM
|
||||
XOR reg8,reg8 \301\1\x32\110 8086
|
||||
XOR reg8,reg8 \1\x32\110 8086
|
||||
XOR reg16,mem \320\301\1\x33\110 8086,SM
|
||||
XOR reg16,reg16 \320\301\1\x33\110 8086
|
||||
XOR reg16,reg16 \320\1\x33\110 8086
|
||||
XOR reg32,mem \321\301\1\x33\110 386,SM
|
||||
XOR reg32,reg32 \321\301\1\x33\110 386
|
||||
XOR reg32,reg32 \321\1\x33\110 386
|
||||
XOR rm16,imm8 \320\300\1\x83\206\15 8086
|
||||
XOR rm32,imm8 \321\300\1\x83\206\15 386
|
||||
XOR reg_al,imm \1\x34\21 8086,SM
|
||||
@ -1138,9 +1138,9 @@ XOR mem,imm8 \300\1\x80\206\21 8086,SM
|
||||
XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM
|
||||
XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM
|
||||
CMOVcc reg16,mem \320\301\1\x0F\330\x40\110 P6,SM
|
||||
CMOVcc reg16,reg16 \320\301\1\x0F\330\x40\110 P6
|
||||
CMOVcc reg16,reg16 \320\1\x0F\330\x40\110 P6
|
||||
CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM
|
||||
CMOVcc reg32,reg32 \321\301\1\x0F\330\x40\110 P6
|
||||
CMOVcc reg32,reg32 \321\1\x0F\330\x40\110 P6
|
||||
Jcc imm|near \322\1\x0F\330\x80\64 386
|
||||
Jcc imm16|near \320\1\x0F\330\x80\64 386
|
||||
Jcc imm32|near \321\1\x0F\330\x80\64 386
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user