insns: add XSAVEC, XSAVES and XRSTORS instructions

Add the XSAVEC, XSAVES, and XRSTORS instructions from the Intel SDM
release 253665-050US (Feb 2014).

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
H. Peter Anvin 2014-02-19 14:55:54 -08:00
parent 31f23b05f4
commit 0b7db57deb
2 changed files with 10 additions and 0 deletions

View File

@ -7,6 +7,10 @@
The NASM 2 series supports x86-64, and is the production version of NASM
since 2007.
\S{cl-2.11.02} Version 2.11.02
\b Add the \c{XSAVEC}, \c{XSAVES} and \c{XRSTORS} family instructions.
\S{cl-2.11.01} Version 2.11.01
\b Allow instructions which implicitly uses \c{XMM0} (\c{VBLENDVPD},

View File

@ -1586,10 +1586,16 @@ XGETBV void [ 0f 01 d0] NEHALEM
XSETBV void [ 0f 01 d1] NEHALEM,PRIV
XSAVE mem [m: np 0f ae /4] NEHALEM
XSAVE64 mem [m: o64 np 0f ae /4] LONG,NEHALEM
XSAVEC mem [m: np 0f c7 /4] FUTURE
XSAVEC64 mem [m: o64 np 0f c7 /4] LONG,FUTURE
XSAVEOPT mem [m: np 0f ae /6] FUTURE
XSAVEOPT64 mem [m: o64 np 0f ae /6] LONG,FUTURE
XSAVES mem [m: np 0f c7 /5] FUTURE
XSAVES64 mem [m: o64 np 0f c7 /5] LONG,FUTURE
XRSTOR mem [m: np 0f ae /5] NEHALEM
XRSTOR64 mem [m: o64 np 0f ae /5] LONG,NEHALEM
XRSTORS mem [m: np 0f c7 /3] FUTURE
XRSTORS64 mem [m: o64 np 0f c7 /3] LONG,FUTURE
; These instructions are not SSE-specific; they are
;# Generic memory operations