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Machine-generated \321->\324 corrections

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Use a script to find \321's that should be \324's.  This is not in any
way guaranteed to be an exhaustive list, however, I have manually verified
that all the items that *were* changed *should* be changed.
This commit is contained in:
H. Peter Anvin 2007-05-30 22:20:01 +00:00
parent 6000b34929
commit 021993cf64
1 changed files with 148 additions and 148 deletions
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296
insns.dat
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@ -27,19 +27,19 @@ ADC mem,reg16 \320\300\1\x11\101 8086,SM
ADC reg16,reg16 \320\1\x11\101 8086
ADC mem,reg32 \321\300\1\x11\101 386,SM
ADC reg32,reg32 \321\1\x11\101 386
ADC mem,reg64 \321\300\1\x11\101 X64,SM
ADC reg64,reg64 \321\1\x11\101 X64
ADC mem,reg64 \324\300\1\x11\101 X64,SM
ADC reg64,reg64 \324\1\x11\101 X64
ADC reg8,mem \301\1\x12\110 8086,SM
ADC reg8,reg8 \1\x12\110 8086
ADC reg16,mem \320\301\1\x13\110 8086,SM
ADC reg16,reg16 \320\1\x13\110 8086
ADC reg32,mem \321\301\1\x13\110 386,SM
ADC reg32,reg32 \321\1\x13\110 386
ADC reg64,mem \321\301\1\x13\110 X64,SM
ADC reg64,reg64 \321\1\x13\110 X64
ADC reg64,mem \324\301\1\x13\110 X64,SM
ADC reg64,reg64 \324\1\x13\110 X64
ADC rm16,imm8 \320\300\1\x83\202\15 8086
ADC rm32,imm8 \321\300\1\x83\202\15 386
ADC rm64,imm8 \321\300\1\x83\202\15 X64
ADC rm64,imm8 \324\300\1\x83\202\15 X64
ADC reg_al,imm \1\x14\21 8086,SM
ADC reg_ax,sbyte \320\1\x83\202\15 8086,SM,ND
ADC reg_ax,imm \320\1\x15\31 8086,SM
@ -50,7 +50,7 @@ ADC reg_rax,imm \321\1\x15\41 X64,SM
ADC rm8,imm \300\1\x80\202\21 8086,SM
ADC rm16,imm \320\300\134\1\x81\202\131 8086,SM
ADC rm32,imm \321\300\144\1\x81\202\141 386,SM
ADC rm64,imm \321\300\144\1\x81\202\141 X64,SM
ADC rm64,imm \324\300\144\1\x81\202\141 X64,SM
ADC mem,imm8 \300\1\x80\202\21 8086,SM
ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM
ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM
@ -60,19 +60,19 @@ ADD mem,reg16 \320\300\1\x01\101 8086,SM
ADD reg16,reg16 \320\1\x01\101 8086
ADD mem,reg32 \321\300\1\x01\101 386,SM
ADD reg32,reg32 \321\1\x01\101 386
ADD mem,reg64 \321\300\1\x01\101 X64,SM
ADD reg64,reg64 \321\1\x01\101 X64
ADD mem,reg64 \324\300\1\x01\101 X64,SM
ADD reg64,reg64 \324\1\x01\101 X64
ADD reg8,mem \301\1\x02\110 8086,SM
ADD reg8,reg8 \1\x02\110 8086
ADD reg16,mem \320\301\1\x03\110 8086,SM
ADD reg16,reg16 \320\1\x03\110 8086
ADD reg32,mem \321\301\1\x03\110 386,SM
ADD reg32,reg32 \321\1\x03\110 386
ADD reg64,mem \321\301\1\x03\110 X64,SM
ADD reg64,reg64 \321\1\x03\110 X64
ADD reg64,mem \324\301\1\x03\110 X64,SM
ADD reg64,reg64 \324\1\x03\110 X64
ADD rm16,imm8 \320\300\1\x83\200\15 8086
ADD rm32,imm8 \321\300\1\x83\200\15 386
ADD rm64,imm8 \321\300\1\x83\200\15 X64
ADD rm64,imm8 \324\300\1\x83\200\15 X64
ADD reg_al,imm \1\x04\21 8086,SM
ADD reg_ax,sbyte \320\1\x83\200\15 8086,SM,ND
ADD reg_ax,imm \320\1\x05\31 8086,SM
@ -83,7 +83,7 @@ ADD reg_rax,imm \323\1\x05\41 X64,SM
ADD rm8,imm \300\1\x80\200\21 8086,SM
ADD rm16,imm \320\300\134\1\x81\200\131 8086,SM
ADD rm32,imm \321\300\144\1\x81\200\141 386,SM
ADD rm64,imm \321\300\144\1\x81\200\141 X64,SM
ADD rm64,imm \324\300\144\1\x81\200\141 X64,SM
ADD mem,imm8 \300\1\x80\200\21 8086,SM
ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM
ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM
@ -93,19 +93,19 @@ AND mem,reg16 \320\300\1\x21\101 8086,SM
AND reg16,reg16 \320\1\x21\101 8086
AND mem,reg32 \321\300\1\x21\101 386,SM
AND reg32,reg32 \321\1\x21\101 386
AND mem,reg64 \321\300\1\x21\101 X64,SM
AND reg64,reg64 \321\1\x21\101 X64
AND mem,reg64 \324\300\1\x21\101 X64,SM
AND reg64,reg64 \324\1\x21\101 X64
AND reg8,mem \301\1\x22\110 8086,SM
AND reg8,reg8 \1\x22\110 8086
AND reg16,mem \320\301\1\x23\110 8086,SM
AND reg16,reg16 \320\1\x23\110 8086
AND reg32,mem \321\301\1\x23\110 386,SM
AND reg32,reg32 \321\1\x23\110 386
AND reg64,mem \321\301\1\x23\110 X64,SM
AND reg64,reg64 \321\1\x23\110 X64
AND reg64,mem \324\301\1\x23\110 X64,SM
AND reg64,reg64 \324\1\x23\110 X64
AND rm16,imm8 \320\300\1\x83\204\15 8086
AND rm32,imm8 \321\300\1\x83\204\15 386
AND rm64,imm8 \321\300\1\x83\204\15 X64
AND rm64,imm8 \324\300\1\x83\204\15 X64
AND reg_al,imm \1\x24\21 8086,SM
AND reg_ax,sbyte \320\1\x83\204\15 8086,SM,ND
AND reg_ax,imm \320\1\x25\31 8086,SM
@ -116,7 +116,7 @@ AND reg_rax,imm \324\1\x25\41 X64,SM
AND rm8,imm \300\1\x80\204\21 8086,SM
AND rm16,imm \320\300\134\1\x81\204\131 8086,SM
AND rm32,imm \321\300\144\1\x81\204\141 386,SM
AND rm64,imm \321\300\144\1\x81\204\141 X64,SM
AND rm64,imm \324\300\144\1\x81\204\141 X64,SM
AND mem,imm8 \300\1\x80\204\21 8086,SM
AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM
AND mem,imm32 \321\300\144\1\x81\204\141 386,SM
@ -128,52 +128,52 @@ BSF reg16,mem \320\301\2\x0F\xBC\110 386,SM
BSF reg16,reg16 \320\2\x0F\xBC\110 386
BSF reg32,mem \321\301\2\x0F\xBC\110 386,SM
BSF reg32,reg32 \321\2\x0F\xBC\110 386
BSF reg64,mem \321\301\2\x0F\xBC\110 X64,SM
BSF reg64,reg64 \321\2\x0F\xBC\110 X64
BSF reg64,mem \324\301\2\x0F\xBC\110 X64,SM
BSF reg64,reg64 \324\2\x0F\xBC\110 X64
BSR reg16,mem \320\301\2\x0F\xBD\110 386,SM
BSR reg16,reg16 \320\2\x0F\xBD\110 386
BSR reg32,mem \321\301\2\x0F\xBD\110 386,SM
BSR reg32,reg32 \321\2\x0F\xBD\110 386
BSR reg64,mem \321\301\2\x0F\xBD\110 X64,SM
BSR reg64,reg64 \321\2\x0F\xBD\110 X64
BSR reg64,mem \324\301\2\x0F\xBD\110 X64,SM
BSR reg64,reg64 \324\2\x0F\xBD\110 X64
BSWAP reg32 \321\1\x0F\10\xC8 486
BSWAP reg64 \321\1\x0F\10\xC8 X64
BSWAP reg64 \324\1\x0F\10\xC8 X64
BT mem,reg16 \320\300\2\x0F\xA3\101 386,SM
BT reg16,reg16 \320\2\x0F\xA3\101 386
BT mem,reg32 \321\300\2\x0F\xA3\101 386,SM
BT reg32,reg32 \321\2\x0F\xA3\101 386
BT mem,reg64 \321\300\2\x0F\xA3\101 X64,SM
BT reg64,reg64 \321\2\x0F\xA3\101 X64
BT mem,reg64 \324\300\2\x0F\xA3\101 X64,SM
BT reg64,reg64 \324\2\x0F\xA3\101 X64
BT rm16,imm \320\300\2\x0F\xBA\204\25 386,SB
BT rm32,imm \321\300\2\x0F\xBA\204\25 386,SB
BT rm64,imm \321\300\2\x0F\xBA\204\25 X64,SB
BT rm64,imm \324\300\2\x0F\xBA\204\25 X64,SB
BTC mem,reg16 \320\300\2\x0F\xBB\101 386,SM
BTC reg16,reg16 \320\2\x0F\xBB\101 386
BTC mem,reg32 \321\300\2\x0F\xBB\101 386,SM
BTC reg32,reg32 \321\2\x0F\xBB\101 386
BTC mem,reg64 \321\300\2\x0F\xBB\101 X64,SM
BTC reg64,reg64 \321\2\x0F\xBB\101 X64
BTC mem,reg64 \324\300\2\x0F\xBB\101 X64,SM
BTC reg64,reg64 \324\2\x0F\xBB\101 X64
BTC rm16,imm \320\300\2\x0F\xBA\207\25 386,SB
BTC rm32,imm \321\300\2\x0F\xBA\207\25 386,SB
BTC rm64,imm \321\300\2\x0F\xBA\207\25 X64,SB
BTC rm64,imm \324\300\2\x0F\xBA\207\25 X64,SB
BTR mem,reg16 \320\300\2\x0F\xB3\101 386,SM
BTR reg16,reg16 \320\2\x0F\xB3\101 386
BTR mem,reg32 \321\300\2\x0F\xB3\101 386,SM
BTR reg32,reg32 \321\2\x0F\xB3\101 386
BTR mem,reg64 \321\300\2\x0F\xB3\101 X64,SM
BTR reg64,reg64 \321\2\x0F\xB3\101 X64
BTR mem,reg64 \324\300\2\x0F\xB3\101 X64,SM
BTR reg64,reg64 \324\2\x0F\xB3\101 X64
BTR rm16,imm \320\300\2\x0F\xBA\206\25 386,SB
BTR rm32,imm \321\300\2\x0F\xBA\206\25 386,SB
BTR rm64,imm \321\300\2\x0F\xBA\206\25 X64,SB
BTR rm64,imm \324\300\2\x0F\xBA\206\25 X64,SB
BTS mem,reg16 \320\300\2\x0F\xAB\101 386,SM
BTS reg16,reg16 \320\2\x0F\xAB\101 386
BTS mem,reg32 \321\300\2\x0F\xAB\101 386,SM
BTS reg32,reg32 \321\2\x0F\xAB\101 386
BTS mem,reg64 \321\300\2\x0F\xAB\101 X64,SM
BTS reg64,reg64 \321\2\x0F\xAB\101 X64
BTS mem,reg64 \324\300\2\x0F\xAB\101 X64,SM
BTS reg64,reg64 \324\2\x0F\xAB\101 X64
BTS rm16,imm \320\300\2\x0F\xBA\205\25 386,SB
BTS rm32,imm \321\300\2\x0F\xBA\205\25 386,SB
BTS rm64,imm \321\300\2\x0F\xBA\205\25 X64,SB
BTS rm64,imm \324\300\2\x0F\xBA\205\25 X64,SB
CALL imm \322\1\xE8\64 8086
CALL imm|near \322\1\xE8\64 8086
CALL imm|far \322\1\x9A\34\37 8086,ND,NOLONG
@ -197,7 +197,7 @@ CALL mem32|near \321\300\1\xFF\202 386,NOLONG
CALL mem64|near \324\300\1\xFF\202 X64
CALL reg16 \320\300\1\xFF\202 8086
CALL reg32 \321\300\1\xFF\202 386,NOLONG
CALL reg64 \321\300\1\xFF\202 X64
CALL reg64 \324\300\1\xFF\202 X64
CALL mem \322\300\1\xFF\202 8086
CALL mem16 \320\300\1\xFF\202 8086
CALL mem32 \321\300\1\xFF\202 386,NOLONG
@ -218,19 +218,19 @@ CMP mem,reg16 \320\300\1\x39\101 8086,SM
CMP reg16,reg16 \320\1\x39\101 8086
CMP mem,reg32 \321\300\1\x39\101 386,SM
CMP reg32,reg32 \321\1\x39\101 386
CMP mem,reg64 \321\300\1\x39\101 X64,SM
CMP reg64,reg64 \321\1\x39\101 X64
CMP mem,reg64 \324\300\1\x39\101 X64,SM
CMP reg64,reg64 \324\1\x39\101 X64
CMP reg8,mem \301\1\x3A\110 8086,SM
CMP reg8,reg8 \1\x3A\110 8086
CMP reg16,mem \320\301\1\x3B\110 8086,SM
CMP reg16,reg16 \320\1\x3B\110 8086
CMP reg32,mem \321\301\1\x3B\110 386,SM
CMP reg32,reg32 \321\1\x3B\110 386
CMP reg64,mem \321\301\1\x3B\110 X64,SM
CMP reg64,reg64 \321\1\x3B\110 X64
CMP reg64,mem \324\301\1\x3B\110 X64,SM
CMP reg64,reg64 \324\1\x3B\110 X64
CMP rm16,imm8 \320\300\1\x83\207\15 8086
CMP rm32,imm8 \321\300\1\x83\207\15 386
CMP rm64,imm8 \321\300\1\x83\207\15 X64
CMP rm64,imm8 \324\300\1\x83\207\15 X64
CMP reg_al,imm \1\x3C\21 8086,SM
CMP reg_ax,sbyte \320\1\x83\207\15 8086,SM,ND
CMP reg_ax,imm \320\1\x3D\31 8086,SM
@ -241,7 +241,7 @@ CMP reg_rax,imm \321\1\x3D\41 X64,SM
CMP rm8,imm \300\1\x80\207\21 8086,SM
CMP rm16,imm \320\300\134\1\x81\207\131 8086,SM
CMP rm32,imm \321\300\144\1\x81\207\141 386,SM
CMP rm64,imm \321\300\144\1\x81\207\141 X64,SM
CMP rm64,imm \324\300\144\1\x81\207\141 X64,SM
CMP mem,imm8 \300\1\x80\207\21 8086,SM
CMP mem,imm16 \320\300\134\1\x81\207\131 8086,SM
CMP mem,imm32 \321\300\144\1\x81\207\141 386,SM
@ -255,8 +255,8 @@ CMPXCHG mem,reg16 \320\300\2\x0F\xB1\101 PENT,SM
CMPXCHG reg16,reg16 \320\2\x0F\xB1\101 PENT
CMPXCHG mem,reg32 \321\300\2\x0F\xB1\101 PENT,SM
CMPXCHG reg32,reg32 \321\2\x0F\xB1\101 PENT
CMPXCHG mem,reg64 \321\300\2\x0F\xB1\101 X64,SM
CMPXCHG reg64,reg64 \321\2\x0F\xB1\101 X64
CMPXCHG mem,reg64 \324\300\2\x0F\xB1\101 X64,SM
CMPXCHG reg64,reg64 \324\2\x0F\xB1\101 X64
CMPXCHG486 mem,reg8 \300\2\x0F\xA6\101 486,SM,UNDOC
CMPXCHG486 reg8,reg8 \2\x0F\xA6\101 486,UNDOC
CMPXCHG486 mem,reg16 \320\300\2\x0F\xA7\101 486,SM,UNDOC
@ -278,11 +278,11 @@ DEC reg32 \321\10\x48 386,NOLONG
DEC rm8 \300\1\xFE\201 8086
DEC rm16 \320\300\1\xFF\201 8086
DEC rm32 \321\300\1\xFF\201 386
DEC rm64 \321\300\1\xFF\201 X64
DEC rm64 \324\300\1\xFF\201 X64
DIV rm8 \300\1\xF6\206 8086
DIV rm16 \320\300\1\xF7\206 8086
DIV rm32 \321\300\1\xF7\206 386
DIV rm64 \321\300\1\xF7\206 X64
DIV rm64 \324\300\1\xF7\206 X64
DQ ignore ignore ignore
DT ignore ignore ignore
DW ignore ignore ignore
@ -484,17 +484,17 @@ ICEBP void \1\xF1 386,ND
IDIV rm8 \300\1\xF6\207 8086
IDIV rm16 \320\300\1\xF7\207 8086
IDIV rm32 \321\300\1\xF7\207 386
IDIV rm64 \321\300\1\xF7\207 X64
IDIV rm64 \324\300\1\xF7\207 X64
IMUL rm8 \300\1\xF6\205 8086
IMUL rm16 \320\300\1\xF7\205 8086
IMUL rm32 \321\300\1\xF7\205 386
IMUL rm64 \321\300\1\xF7\205 X64
IMUL rm64 \324\300\1\xF7\205 X64
IMUL reg16,mem \320\301\2\x0F\xAF\110 386,SM
IMUL reg16,reg16 \320\2\x0F\xAF\110 386
IMUL reg32,mem \321\301\2\x0F\xAF\110 386,SM
IMUL reg32,reg32 \321\2\x0F\xAF\110 386
IMUL reg64,mem \321\301\2\x0F\xAF\110 X64,SM
IMUL reg64,reg64 \321\2\x0F\xAF\110 X64
IMUL reg64,mem \324\301\2\x0F\xAF\110 X64,SM
IMUL reg64,reg64 \324\2\x0F\xAF\110 X64
IMUL reg16,mem,imm8 \320\301\1\x6B\110\16 186,SM
IMUL reg16,mem,sbyte \320\301\1\x6B\110\16 186,SM,ND
IMUL reg16,mem,imm16 \320\301\1\x69\110\32 186,SM
@ -511,14 +511,14 @@ IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386
IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND
IMUL reg32,reg32,imm32 \321\1\x69\110\42 386
IMUL reg32,reg32,imm \321\145\1\x69\110\142 386,SM,ND
IMUL reg64,mem,imm8 \321\301\1\x6B\110\16 X64,SM
IMUL reg64,mem,sbyte \321\301\1\x6B\110\16 X64,SM,ND
IMUL reg64,mem,imm32 \321\301\1\x69\110\42 X64,SM
IMUL reg64,mem,imm \321\301\145\1\x69\110\142 X64,SM,ND
IMUL reg64,reg64,imm8 \321\1\x6B\110\16 X64
IMUL reg64,reg64,sbyte \321\1\x6B\110\16 X64,SM,ND
IMUL reg64,reg64,imm32 \321\1\x69\110\42 X64
IMUL reg64,reg64,imm \321\145\1\x69\110\142 X64,SM,ND
IMUL reg64,mem,imm8 \324\301\1\x6B\110\16 X64,SM
IMUL reg64,mem,sbyte \324\301\1\x6B\110\16 X64,SM,ND
IMUL reg64,mem,imm32 \324\301\1\x69\110\42 X64,SM
IMUL reg64,mem,imm \324\301\145\1\x69\110\142 X64,SM,ND
IMUL reg64,reg64,imm8 \324\1\x6B\110\16 X64
IMUL reg64,reg64,sbyte \324\1\x6B\110\16 X64,SM,ND
IMUL reg64,reg64,imm32 \324\1\x69\110\42 X64
IMUL reg64,reg64,imm \324\145\1\x69\110\142 X64,SM,ND
IMUL reg16,imm8 \320\1\x6B\100\15 186
IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND
IMUL reg16,imm16 \320\1\x69\100\31 186
@ -527,9 +527,9 @@ IMUL reg32,imm8 \321\1\x6B\100\15 386
IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND
IMUL reg32,imm32 \321\1\x69\100\41 386
IMUL reg32,imm \321\144\1\x69\100\141 386,SM,ND
IMUL reg64,sbyte \321\1\x6B\100\15 X64,SM,ND
IMUL reg64,imm32 \321\1\x69\100\41 X64
IMUL reg64,imm \321\144\1\x69\100\141 X64,SM,ND
IMUL reg64,sbyte \324\1\x6B\100\15 X64,SM,ND
IMUL reg64,imm32 \324\1\x69\100\41 X64
IMUL reg64,imm \324\144\1\x69\100\141 X64,SM,ND
IN reg_al,imm \1\xE4\25 8086,SB
IN reg_ax,imm \320\1\xE5\25 8086,SB
IN reg_eax,imm \321\1\xE5\25 386,SB
@ -541,7 +541,7 @@ INC reg32 \321\10\x40 386,NOLONG
INC rm8 \300\1\xFE\200 8086
INC rm16 \320\300\1\xFF\200 8086
INC rm32 \321\300\1\xFF\200 386
INC rm64 \321\300\1\xFF\200 X64
INC rm64 \324\300\1\xFF\200 X64
INCBIN ignore ignore ignore
INSB void \1\x6C 186
INSD void \321\1\x6D 386
@ -583,14 +583,14 @@ JMP mem32|far \321\300\1\xFF\205 386
JMP mem|near \322\300\1\xFF\204 8086
JMP mem16|near \320\300\1\xFF\204 8086
JMP mem32|near \321\300\1\xFF\204 386,NOLONG
JMP mem64|near \321\300\1\xFF\204 X64
JMP mem64|near \324\300\1\xFF\204 X64
JMP reg16 \320\300\1\xFF\204 8086
JMP reg32 \321\300\1\xFF\204 386,NOLONG
JMP reg64 \321\300\1\xFF\204 X64
JMP reg64 \324\300\1\xFF\204 X64
JMP mem \322\300\1\xFF\204 8086
JMP mem16 \320\300\1\xFF\204 8086
JMP mem32 \321\300\1\xFF\204 386,NOLONG
JMP mem64 \321\300\1\xFF\204 X64
JMP mem64 \324\300\1\xFF\204 X64
JMPE imm \322\2\x0F\xB8\64 IA64
JMPE imm16 \320\2\x0F\xB8\64 IA64
JMPE imm32 \321\2\x0F\xB8\64 IA64
@ -602,13 +602,13 @@ LAR reg16,mem \320\301\2\x0F\x02\110 286,PROT,SM
LAR reg16,reg16 \320\2\x0F\x02\110 286,PROT
LAR reg32,mem \321\301\2\x0F\x02\110 386,PROT,SM
LAR reg32,reg32 \321\2\x0F\x02\110 386,PROT
LAR reg64,mem \321\301\2\x0F\x02\110 X64,SM
LAR reg64,reg64 \321\2\x0F\x02\110 X64,PROT
LAR reg64,mem \324\301\2\x0F\x02\110 X64,SM
LAR reg64,reg64 \324\2\x0F\x02\110 X64,PROT
LDS reg16,mem \320\301\1\xC5\110 8086,NOLONG
LDS reg32,mem \321\301\1\xC5\110 386,NOLONG
LEA reg16,mem \320\301\1\x8D\110 8086
LEA reg32,mem \321\301\1\x8D\110 386
LEA reg64,mem \321\301\1\x8D\110 X64
LEA reg64,mem \324\301\1\x8D\110 X64
LEAVE void \1\xC9 186
LES reg16,mem \320\301\1\xC4\110 8086,NOLONG
LES reg32,mem \321\301\1\xC4\110 386,NOLONG
@ -655,8 +655,8 @@ LSL reg16,mem \320\301\2\x0F\x03\110 286,PROT,SM
LSL reg16,reg16 \320\2\x0F\x03\110 286,PROT
LSL reg32,mem \321\301\2\x0F\x03\110 386,PROT,SM
LSL reg32,reg32 \321\2\x0F\x03\110 386,PROT
LSL reg64,mem \321\301\2\x0F\x03\110 X64,SM
LSL reg64,reg64 \321\2\x0F\x03\110 X64,PROT
LSL reg64,mem \324\301\2\x0F\x03\110 X64,SM
LSL reg64,reg64 \324\2\x0F\x03\110 X64,PROT
LSS reg16,mem \320\301\2\x0F\xB2\110 386
LSS reg32,mem \321\301\2\x0F\xB2\110 386
LTR mem \300\1\x0F\17\203 286,PROT,PRIV
@ -704,7 +704,7 @@ MOV reg16,reg16 \320\1\x8B\110 8086
MOV reg32,mem \321\301\1\x8B\110 386,SM
MOV reg32,reg32 \321\1\x8B\110 386
MOV reg64,mem \324\301\1\x8B\110 X64,SM
MOV reg64,reg64 \321\1\x8B\110 X64
MOV reg64,reg64 \324\1\x8B\110 X64
MOV reg8,imm \10\xB0\21 8086,SM
MOV reg16,imm \320\10\xB8\31 8086,SM
MOV reg32,imm \321\10\xB8\41 386,SM
@ -742,49 +742,49 @@ MOVSX reg16,mem \320\301\2\x0F\xBE\110 386,SB
MOVSX reg16,reg8 \320\2\x0F\xBE\110 386
MOVSX reg32,rm8 \321\301\2\x0F\xBE\110 386
MOVSX reg32,rm16 \321\301\2\x0F\xBF\110 386
MOVSX reg64,rm8 \321\301\2\x0F\xBE\110 X64
MOVSX reg64,rm16 \321\301\2\x0F\xBF\110 X64
MOVSX reg64,rm32 \321\301\1\x63\110 X64
MOVSX reg64,rm8 \324\301\2\x0F\xBE\110 X64
MOVSX reg64,rm16 \324\301\2\x0F\xBF\110 X64
MOVSX reg64,rm32 \324\301\1\x63\110 X64
MOVZX reg16,mem \320\301\2\x0F\xB6\110 386,SB
MOVZX reg16,reg8 \320\2\x0F\xB6\110 386
MOVZX reg32,rm8 \321\301\2\x0F\xB6\110 386
MOVZX reg32,rm16 \321\301\2\x0F\xB7\110 386
MOVZX reg64,rm8 \321\301\2\x0F\xB6\110 X64
MOVZX reg64,rm16 \321\301\2\x0F\xB7\110 X64
MOVZX reg64,rm8 \324\301\2\x0F\xB6\110 X64
MOVZX reg64,rm16 \324\301\2\x0F\xB7\110 X64
MUL rm8 \300\1\xF6\204 8086
MUL rm16 \320\300\1\xF7\204 8086
MUL rm32 \321\300\1\xF7\204 386
MUL rm64 \321\300\1\xF7\204 X64
MUL rm64 \324\300\1\xF7\204 X64
MWAIT void \3\x0F\x01\xC9 PRESCOTT
MWAIT reg_eax,reg_ecx \3\x0F\x01\xC9 PRESCOTT,ND
NEG rm8 \300\1\xF6\203 8086
NEG rm16 \320\300\1\xF7\203 8086
NEG rm32 \321\300\1\xF7\203 386
NEG rm64 \321\300\1\xF7\203 X64
NEG rm64 \324\300\1\xF7\203 X64
NOP void \1\x90 8086
NOT rm8 \300\1\xF6\202 8086
NOT rm16 \320\300\1\xF7\202 8086
NOT rm32 \321\300\1\xF7\202 386
NOT rm64 \321\300\1\xF7\202 X64
NOT rm64 \324\300\1\xF7\202 X64
OR mem,reg8 \300\1\x08\101 8086,SM
OR reg8,reg8 \1\x08\101 8086
OR mem,reg16 \320\300\1\x09\101 8086,SM
OR reg16,reg16 \320\1\x09\101 8086
OR mem,reg32 \321\300\1\x09\101 386,SM
OR reg32,reg32 \321\1\x09\101 386
OR mem,reg64 \321\300\1\x09\101 X64,SM
OR reg64,reg64 \321\1\x09\101 X64
OR mem,reg64 \324\300\1\x09\101 X64,SM
OR reg64,reg64 \324\1\x09\101 X64
OR reg8,mem \301\1\x0A\110 8086,SM
OR reg8,reg8 \1\x0A\110 8086
OR reg16,mem \320\301\1\x0B\110 8086,SM
OR reg16,reg16 \320\1\x0B\110 8086
OR reg32,mem \321\301\1\x0B\110 386,SM
OR reg32,reg32 \321\1\x0B\110 386
OR reg64,mem \321\301\1\x0B\110 X64,SM
OR reg64,reg64 \321\1\x0B\110 X64
OR reg64,mem \324\301\1\x0B\110 X64,SM
OR reg64,reg64 \324\1\x0B\110 X64
OR rm16,imm8 \320\300\1\x83\201\15 8086
OR rm32,imm8 \321\300\1\x83\201\15 386
OR rm64,imm8 \321\300\1\x83\201\15 X64
OR rm64,imm8 \324\300\1\x83\201\15 X64
OR reg_al,imm \1\x0C\21 8086,SM
OR reg_ax,sbyte \320\1\x83\201\15 8086,SM,ND
OR reg_ax,imm \320\1\x0D\31 8086,SM
@ -795,7 +795,7 @@ OR reg_rax,imm \321\1\x0D\41 X64,SM
OR rm8,imm \300\1\x80\201\21 8086,SM
OR rm16,imm \320\300\134\1\x81\201\131 8086,SM
OR rm32,imm \321\300\144\1\x81\201\141 386,SM
OR rm64,imm \321\300\144\1\x81\201\141 X64,SM
OR rm64,imm \324\300\144\1\x81\201\141 X64,SM
OR mem,imm8 \300\1\x80\201\21 8086,SM
OR mem,imm16 \320\300\134\1\x81\201\131 8086,SM
OR mem,imm32 \321\300\144\1\x81\201\141 386,SM
@ -1014,9 +1014,9 @@ RCL rm16,imm \320\300\1\xC1\202\25 186,SB
RCL rm32,unity \321\300\1\xD1\202 386
RCL rm32,reg_cl \321\300\1\xD3\202 386
RCL rm32,imm \321\300\1\xC1\202\25 386,SB
RCL rm64,unity \321\300\1\xD1\202 X64
RCL rm64,reg_cl \321\300\1\xD3\202 X64
RCL rm64,imm \321\300\1\xC1\202\25 X64,SB
RCL rm64,unity \324\300\1\xD1\202 X64
RCL rm64,reg_cl \324\300\1\xD3\202 X64
RCL rm64,imm \324\300\1\xC1\202\25 X64,SB
RCR rm8,unity \300\1\xD0\203 8086
RCR rm8,reg_cl \300\1\xD2\203 8086
RCR rm8,imm \300\1\xC0\203\25 186,SB
@ -1026,9 +1026,9 @@ RCR rm16,imm \320\300\1\xC1\203\25 186,SB
RCR rm32,unity \321\300\1\xD1\203 386
RCR rm32,reg_cl \321\300\1\xD3\203 386
RCR rm32,imm \321\300\1\xC1\203\25 386,SB
RCR rm64,unity \321\300\1\xD1\203 X64
RCR rm64,reg_cl \321\300\1\xD3\203 X64
RCR rm64,imm \321\300\1\xC1\203\25 X64,SB
RCR rm64,unity \324\300\1\xD1\203 X64
RCR rm64,reg_cl \324\300\1\xD3\203 X64
RCR rm64,imm \324\300\1\xC1\203\25 X64,SB
RDSHR rm32 \321\300\2\x0F\x36\200 P6,CYRIX,SMM
RDMSR void \2\x0F\x32 PENT,PRIV
RDPMC void \2\x0F\x33 P6
@ -1054,9 +1054,9 @@ ROL rm16,imm \320\300\1\xC1\200\25 186,SB
ROL rm32,unity \321\300\1\xD1\200 386
ROL rm32,reg_cl \321\300\1\xD3\200 386
ROL rm32,imm \321\300\1\xC1\200\25 386,SB
ROL rm64,unity \321\300\1\xD1\200 X64
ROL rm64,reg_cl \321\300\1\xD3\200 X64
ROL rm64,imm \321\300\1\xC1\200\25 X64,SB
ROL rm64,unity \324\300\1\xD1\200 X64
ROL rm64,reg_cl \324\300\1\xD3\200 X64
ROL rm64,imm \324\300\1\xC1\200\25 X64,SB
ROR rm8,unity \300\1\xD0\201 8086
ROR rm8,reg_cl \300\1\xD2\201 8086
ROR rm8,imm \300\1\xC0\201\25 186,SB
@ -1066,9 +1066,9 @@ ROR rm16,imm \320\300\1\xC1\201\25 186,SB
ROR rm32,unity \321\300\1\xD1\201 386
ROR rm32,reg_cl \321\300\1\xD3\201 386
ROR rm32,imm \321\300\1\xC1\201\25 386,SB
ROR rm64,unity \321\300\1\xD1\201 X64
ROR rm64,reg_cl \321\300\1\xD3\201 X64
ROR rm64,imm \321\300\1\xC1\201\25 X64,SB
ROR rm64,unity \324\300\1\xD1\201 X64
ROR rm64,reg_cl \324\300\1\xD3\201 X64
ROR rm64,imm \324\300\1\xC1\201\25 X64,SB
RSDC reg_sreg,mem80 \301\2\x0F\x79\110 486,CYRIX,SMM
RSLDT mem80 \300\2\x0F\x7B\200 486,CYRIX,SMM
RSM void \2\x0F\xAA PENT,SMM
@ -1083,9 +1083,9 @@ SAL rm16,imm \320\300\1\xC1\204\25 186,ND,SB
SAL rm32,unity \321\300\1\xD1\204 386,ND
SAL rm32,reg_cl \321\300\1\xD3\204 386,ND
SAL rm32,imm \321\300\1\xC1\204\25 386,ND,SB
SAL rm64,unity \321\300\1\xD1\204 X64,ND
SAL rm64,reg_cl \321\300\1\xD3\204 X64,ND
SAL rm64,imm \321\300\1\xC1\204\25 X64,ND,SB
SAL rm64,unity \324\300\1\xD1\204 X64,ND
SAL rm64,reg_cl \324\300\1\xD3\204 X64,ND
SAL rm64,imm \324\300\1\xC1\204\25 X64,ND,SB
SALC void \1\xD6 8086,UNDOC
SAR rm8,unity \300\1\xD0\207 8086
SAR rm8,reg_cl \300\1\xD2\207 8086
@ -1096,28 +1096,28 @@ SAR rm16,imm \320\300\1\xC1\207\25 186,SB
SAR rm32,unity \321\300\1\xD1\207 386
SAR rm32,reg_cl \321\300\1\xD3\207 386
SAR rm32,imm \321\300\1\xC1\207\25 386,SB
SAR rm64,unity \321\300\1\xD1\207 X64
SAR rm64,reg_cl \321\300\1\xD3\207 X64
SAR rm64,imm \321\300\1\xC1\207\25 X64,SB
SAR rm64,unity \324\300\1\xD1\207 X64
SAR rm64,reg_cl \324\300\1\xD3\207 X64
SAR rm64,imm \324\300\1\xC1\207\25 X64,SB
SBB mem,reg8 \300\1\x18\101 8086,SM
SBB reg8,reg8 \1\x18\101 8086
SBB mem,reg16 \320\300\1\x19\101 8086,SM
SBB reg16,reg16 \320\1\x19\101 8086
SBB mem,reg32 \321\300\1\x19\101 386,SM
SBB reg32,reg32 \321\1\x19\101 386
SBB mem,reg64 \321\300\1\x19\101 X64,SM
SBB reg64,reg64 \321\1\x19\101 X64
SBB mem,reg64 \324\300\1\x19\101 X64,SM
SBB reg64,reg64 \324\1\x19\101 X64
SBB reg8,mem \301\1\x1A\110 8086,SM
SBB reg8,reg8 \1\x1A\110 8086
SBB reg16,mem \320\301\1\x1B\110 8086,SM
SBB reg16,reg16 \320\1\x1B\110 8086
SBB reg32,mem \321\301\1\x1B\110 386,SM
SBB reg32,reg32 \321\1\x1B\110 386
SBB reg64,mem \321\301\1\x1B\110 X64,SM
SBB reg64,reg64 \321\1\x1B\110 X64
SBB reg64,mem \324\301\1\x1B\110 X64,SM
SBB reg64,reg64 \324\1\x1B\110 X64
SBB rm16,imm8 \320\300\1\x83\203\15 8086
SBB rm32,imm8 \321\300\1\x83\203\15 386
SBB rm64,imm8 \321\300\1\x83\203\15 X64
SBB rm64,imm8 \324\300\1\x83\203\15 X64
SBB reg_al,imm \1\x1C\21 8086,SM
SBB reg_ax,sbyte \320\1\x83\203\15 8086,SM,ND
SBB reg_ax,imm \320\1\x1D\31 8086,SM
@ -1128,7 +1128,7 @@ SBB reg_rax,imm \321\1\x1D\41 X64,SM
SBB rm8,imm \300\1\x80\203\21 8086,SM
SBB rm16,imm \320\300\134\1\x81\203\131 8086,SM
SBB rm32,imm \321\300\144\1\x81\203\141 386,SM
SBB rm64,imm \321\300\144\1\x81\203\141 X64,SM
SBB rm64,imm \324\300\144\1\x81\203\141 X64,SM
SBB mem,imm8 \300\1\x80\203\21 8086,SM
SBB mem,imm16 \320\300\134\1\x81\203\131 8086,SM
SBB mem,imm32 \321\300\144\1\x81\203\141 386,SM
@ -1147,21 +1147,21 @@ SHL rm16,imm \320\300\1\xC1\204\25 186,SB
SHL rm32,unity \321\300\1\xD1\204 386
SHL rm32,reg_cl \321\300\1\xD3\204 386
SHL rm32,imm \321\300\1\xC1\204\25 386,SB
SHL rm64,unity \321\300\1\xD1\204 X64
SHL rm64,reg_cl \321\300\1\xD3\204 X64
SHL rm64,imm \321\300\1\xC1\204\25 X64,SB
SHL rm64,unity \324\300\1\xD1\204 X64
SHL rm64,reg_cl \324\300\1\xD3\204 X64
SHL rm64,imm \324\300\1\xC1\204\25 X64,SB
SHLD mem,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD reg16,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD mem,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD reg32,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD mem,reg64,imm \300\321\2\x0F\xA4\101\26 X64,SM2,SB,AR2
SHLD reg64,reg64,imm \321\2\x0F\xA4\101\26 X64,SM2,SB,AR2
SHLD mem,reg64,imm \300\324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
SHLD reg64,reg64,imm \324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
SHLD mem,reg16,reg_cl \300\320\2\x0F\xA5\101 386,SM
SHLD reg16,reg16,reg_cl \320\2\x0F\xA5\101 386
SHLD mem,reg32,reg_cl \300\321\2\x0F\xA5\101 386,SM
SHLD reg32,reg32,reg_cl \321\2\x0F\xA5\101 386
SHLD mem,reg64,reg_cl \300\321\2\x0F\xA5\101 X64,SM
SHLD reg64,reg64,reg_cl \321\2\x0F\xA5\101 X64
SHLD mem,reg64,reg_cl \300\324\2\x0F\xA5\101 X64,SM
SHLD reg64,reg64,reg_cl \324\2\x0F\xA5\101 X64
SHR rm8,unity \300\1\xD0\205 8086
SHR rm8,reg_cl \300\1\xD2\205 8086
SHR rm8,imm \300\1\xC0\205\25 186,SB
@ -1171,21 +1171,21 @@ SHR rm16,imm \320\300\1\xC1\205\25 186,SB
SHR rm32,unity \321\300\1\xD1\205 386
SHR rm32,reg_cl \321\300\1\xD3\205 386
SHR rm32,imm \321\300\1\xC1\205\25 386,SB
SHR rm64,unity \321\300\1\xD1\205 X64
SHR rm64,reg_cl \321\300\1\xD3\205 X64
SHR rm64,imm \321\300\1\xC1\205\25 X64,SB
SHR rm64,unity \324\300\1\xD1\205 X64
SHR rm64,reg_cl \324\300\1\xD3\205 X64
SHR rm64,imm \324\300\1\xC1\205\25 X64,SB
SHRD mem,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD reg16,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD mem,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD reg32,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD mem,reg64,imm \300\321\2\x0F\xAC\101\26 X64,SM2,SB,AR2
SHRD reg64,reg64,imm \321\2\x0F\xAC\101\26 X64,SM2,SB,AR2
SHRD mem,reg64,imm \300\324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
SHRD reg64,reg64,imm \324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
SHRD mem,reg16,reg_cl \300\320\2\x0F\xAD\101 386,SM
SHRD reg16,reg16,reg_cl \320\2\x0F\xAD\101 386
SHRD mem,reg32,reg_cl \300\321\2\x0F\xAD\101 386,SM
SHRD reg32,reg32,reg_cl \321\2\x0F\xAD\101 386
SHRD mem,reg64,reg_cl \300\321\2\x0F\xAD\101 X64,SM
SHRD reg64,reg64,reg_cl \321\2\x0F\xAD\101 X64
SHRD mem,reg64,reg_cl \300\324\2\x0F\xAD\101 X64,SM
SHRD reg64,reg64,reg_cl \324\2\x0F\xAD\101 X64
SIDT mem \300\2\x0F\x01\201 286
SLDT mem \300\1\x0F\17\200 286
SLDT mem16 \300\1\x0F\17\200 286
@ -1212,26 +1212,26 @@ STR mem \300\1\x0F\17\201 286,PROT
STR mem16 \300\1\x0F\17\201 286,PROT
STR reg16 \320\1\x0F\17\201 286,PROT
STR reg32 \321\1\x0F\17\201 386,PROT
STR reg64 \321\1\x0F\17\201 X64
STR reg64 \324\1\x0F\17\201 X64
SUB mem,reg8 \300\1\x28\101 8086,SM
SUB reg8,reg8 \1\x28\101 8086
SUB mem,reg16 \320\300\1\x29\101 8086,SM
SUB reg16,reg16 \320\1\x29\101 8086
SUB mem,reg32 \321\300\1\x29\101 386,SM
SUB reg32,reg32 \321\1\x29\101 386
SUB mem,reg64 \321\300\1\x29\101 X64,SM
SUB reg64,reg64 \321\1\x29\101 X64
SUB mem,reg64 \324\300\1\x29\101 X64,SM
SUB reg64,reg64 \324\1\x29\101 X64
SUB reg8,mem \301\1\x2A\110 8086,SM
SUB reg8,reg8 \1\x2A\110 8086
SUB reg16,mem \320\301\1\x2B\110 8086,SM
SUB reg16,reg16 \320\1\x2B\110 8086
SUB reg32,mem \321\301\1\x2B\110 386,SM
SUB reg32,reg32 \321\1\x2B\110 386
SUB reg64,mem \321\301\1\x2B\110 X64,SM
SUB reg64,reg64 \321\1\x2B\110 X64
SUB reg64,mem \324\301\1\x2B\110 X64,SM
SUB reg64,reg64 \324\1\x2B\110 X64
SUB rm16,imm8 \320\300\1\x83\205\15 8086
SUB rm32,imm8 \321\300\1\x83\205\15 386
SUB rm64,imm8 \321\300\1\x83\205\15 X64
SUB rm64,imm8 \324\300\1\x83\205\15 X64
SUB reg_al,imm \1\x2C\21 8086,SM
SUB reg_ax,sbyte \320\1\x83\205\15 8086,SM,ND
SUB reg_ax,imm \320\1\x2D\31 8086,SM
@ -1242,7 +1242,7 @@ SUB reg_rax,imm \321\1\x2D\41 X64,SM
SUB rm8,imm \300\1\x80\205\21 8086,SM
SUB rm16,imm \320\300\134\1\x81\205\131 8086,SM
SUB rm32,imm \321\300\144\1\x81\205\141 386,SM
SUB rm64,imm \321\300\144\1\x81\205\141 X64,SM
SUB rm64,imm \324\300\144\1\x81\205\141 X64,SM
SUB mem,imm8 \300\1\x80\205\21 8086,SM
SUB mem,imm16 \320\300\134\1\x81\205\131 8086,SM
SUB mem,imm32 \321\300\144\1\x81\205\141 386,SM
@ -1260,12 +1260,12 @@ TEST mem,reg16 \320\300\1\x85\101 8086,SM
TEST reg16,reg16 \320\1\x85\101 8086
TEST mem,reg32 \321\300\1\x85\101 386,SM
TEST reg32,reg32 \321\1\x85\101 386
TEST mem,reg64 \321\300\1\x85\101 X64,SM
TEST reg64,reg64 \321\1\x85\101 X64
TEST mem,reg64 \324\300\1\x85\101 X64,SM
TEST reg64,reg64 \324\1\x85\101 X64
TEST reg8,mem \301\1\x84\110 8086,SM
TEST reg16,mem \320\301\1\x85\110 8086,SM
TEST reg32,mem \321\301\1\x85\110 386,SM
TEST reg64,mem \321\301\1\x85\110 X64,SM
TEST reg64,mem \324\301\1\x85\110 X64,SM
TEST reg_al,imm \1\xA8\21 8086,SM
TEST reg_ax,imm \320\1\xA9\31 8086,SM
TEST reg_eax,imm \321\1\xA9\41 386,SM
@ -1273,7 +1273,7 @@ TEST reg_rax,imm \321\1\xA9\41 X64,SM
TEST rm8,imm \300\1\xF6\200\21 8086,SM
TEST rm16,imm \320\300\1\xF7\200\31 8086,SM
TEST rm32,imm \321\300\1\xF7\200\41 386,SM
TEST rm64,imm \321\300\1\xF7\200\41 X64,SM
TEST rm64,imm \324\300\1\xF7\200\41 X64,SM
TEST mem,imm8 \300\1\xF6\200\21 8086,SM
TEST mem,imm16 \320\300\1\xF7\200\31 8086,SM
TEST mem,imm32 \321\300\1\xF7\200\41 386,SM
@ -1309,8 +1309,8 @@ XADD mem,reg16 \320\300\2\x0F\xC1\101 486,SM
XADD reg16,reg16 \320\2\x0F\xC1\101 486
XADD mem,reg32 \321\300\2\x0F\xC1\101 486,SM
XADD reg32,reg32 \321\2\x0F\xC1\101 486
XADD mem,reg64 \321\300\2\x0F\xC1\101 X64,SM
XADD reg64,reg64 \321\2\x0F\xC1\101 X64
XADD mem,reg64 \324\300\2\x0F\xC1\101 X64,SM
XADD reg64,reg64 \324\2\x0F\xC1\101 X64
XBTS reg16,mem \320\301\2\x0F\xA6\110 386,SW,UNDOC,ND
XBTS reg16,reg16 \320\2\x0F\xA6\110 386,UNDOC,ND
XBTS reg32,mem \321\301\2\x0F\xA6\110 386,SD,UNDOC,ND
@ -1326,16 +1326,16 @@ XCHG reg16,mem \320\301\1\x87\110 8086,SM
XCHG reg16,reg16 \320\1\x87\110 8086
XCHG reg32,mem \321\301\1\x87\110 386,SM
XCHG reg32,reg32 \321\1\x87\110 386
XCHG reg64,mem \321\301\1\x87\110 X64,SM
XCHG reg64,reg64 \321\1\x87\110 X64
XCHG reg64,mem \324\301\1\x87\110 X64,SM
XCHG reg64,reg64 \324\1\x87\110 X64
XCHG mem,reg8 \300\1\x86\101 8086,SM
XCHG reg8,reg8 \1\x86\101 8086
XCHG mem,reg16 \320\300\1\x87\101 8086,SM
XCHG reg16,reg16 \320\1\x87\101 8086
XCHG mem,reg32 \321\300\1\x87\101 386,SM
XCHG reg32,reg32 \321\1\x87\101 386
XCHG mem,reg64 \321\300\1\x87\101 X64,SM
XCHG reg64,reg64 \321\1\x87\101 X64
XCHG mem,reg64 \324\300\1\x87\101 X64,SM
XCHG reg64,reg64 \324\1\x87\101 X64
XLATB void \1\xD7 8086
XLAT void \1\xD7 8086
XOR mem,reg8 \300\1\x30\101 8086,SM
@ -1344,19 +1344,19 @@ XOR mem,reg16 \320\300\1\x31\101 8086,SM
XOR reg16,reg16 \320\1\x31\101 8086
XOR mem,reg32 \321\300\1\x31\101 386,SM
XOR reg32,reg32 \321\1\x31\101 386
XOR mem,reg64 \321\300\1\x31\101 X64,SM
XOR reg64,reg64 \321\1\x31\101 X64
XOR mem,reg64 \324\300\1\x31\101 X64,SM
XOR reg64,reg64 \324\1\x31\101 X64
XOR reg8,mem \301\1\x32\110 8086,SM
XOR reg8,reg8 \1\x32\110 8086
XOR reg16,mem \320\301\1\x33\110 8086,SM
XOR reg16,reg16 \320\1\x33\110 8086
XOR reg32,mem \321\301\1\x33\110 386,SM
XOR reg32,reg32 \321\1\x33\110 386
XOR reg64,mem \321\301\1\x33\110 X64,SM
XOR reg64,reg64 \321\1\x33\110 X64
XOR reg64,mem \324\301\1\x33\110 X64,SM
XOR reg64,reg64 \324\1\x33\110 X64
XOR rm16,imm8 \320\300\1\x83\206\15 8086
XOR rm32,imm8 \321\300\1\x83\206\15 386
XOR rm64,imm8 \321\300\1\x83\206\15 X64
XOR rm64,imm8 \324\300\1\x83\206\15 X64
XOR reg_al,imm \1\x34\21 8086,SM
XOR reg_ax,sbyte \320\1\x83\206\15 8086,SM,ND
XOR reg_ax,imm \320\1\x35\31 8086,SM
@ -1367,7 +1367,7 @@ XOR reg_rax,imm \321\1\x35\41 X64,SM
XOR rm8,imm \300\1\x80\206\21 8086,SM
XOR rm16,imm \320\300\134\1\x81\206\131 8086,SM
XOR rm32,imm \321\300\144\1\x81\206\141 386,SM
XOR rm64,imm \321\300\144\1\x81\206\141 X64,SM
XOR rm64,imm \324\300\144\1\x81\206\141 X64,SM
XOR mem,imm8 \300\1\x80\206\21 8086,SM
XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM
XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM
@ -1376,8 +1376,8 @@ CMOVcc reg16,mem \320\301\1\x0F\330\x40\110 P6,SM
CMOVcc reg16,reg16 \320\1\x0F\330\x40\110 P6
CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM
CMOVcc reg32,reg32 \321\1\x0F\330\x40\110 P6
CMOVcc reg64,mem \321\301\1\x0F\330\x40\110 X64,SM
CMOVcc reg64,reg64 \321\1\x0F\330\x40\110 X64
CMOVcc reg64,mem \324\301\1\x0F\330\x40\110 X64,SM
CMOVcc reg64,reg64 \324\1\x0F\330\x40\110 X64
Jcc imm|near \322\1\x0F\330\x80\64 386
Jcc imm16|near \320\1\x0F\330\x80\64 386
Jcc imm32|near \321\1\x0F\330\x80\64 386