mirror/nasm
2
0
Fork 0
mirror of https://github.com/netwide-assembler/nasm.git synced 2024-11-21 03:14:19 +08:00
Code Issues Packages Projects Releases Wiki Activity
e1f985c167
nasm/asm/tokens.dat

136 lines
2.7 KiB
Plaintext
Raw Normal View History

Add copyright notices to other *.dat files Add copyright notices to the other *.dat files. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-06-29 07:58:10 +08:00
## --------------------------------------------------------------------------
##
Specifically if we encounter the PTR keyword Issue a specific suppressible warning if we encounter the PTR keyword. This usually indicates someone mistakenly using MASM syntax in NASM. This introduces a generic infrastructure for issuing warnings for such keywords. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2016-05-10 03:05:56 +08:00
## Copyright 1996-2016 The NASM Authors - All Rights Reserved
Add copyright notices to other *.dat files Add copyright notices to the other *.dat files. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-06-29 07:58:10 +08:00
## See the file AUTHORS included with the NASM distribution for
## the specific copyright holders.
##
## Redistribution and use in source and binary forms, with or without
## modification, are permitted provided that the following
## conditions are met:
##
## * Redistributions of source code must retain the above copyright
## notice, this list of conditions and the following disclaimer.
## * Redistributions in binary form must reproduce the above
## copyright notice, this list of conditions and the following
## disclaimer in the documentation and/or other materials provided
## with the distribution.
##
## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
## DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
## CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
## NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
## LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
## EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
##
## --------------------------------------------------------------------------
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
#
# Tokens other than instructions and registers
#
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_PREFIX, 0, 0, P_*
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
a16
a32
64-bit addressing and prefix handling changes Revamp the address- and prefix-handling code to make more sense in 64-bit mode. We are now a lot closer to where we want to be, but we're not quite there yet. ndisasm may very well have problems, or give counterintuitive output. However, checking it in so we can make forward progress.
2007-10-02 06:41:25 +08:00
a64
asp
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
lock
o16
o32
64-bit addressing and prefix handling changes Revamp the address- and prefix-handling code to make more sense in 64-bit mode. We are now a lot closer to where we want to be, but we're not quite there yet. ndisasm may very well have problems, or give counterintuitive output. However, checking it in so we can make forward progress.
2007-10-02 06:41:25 +08:00
o64
osp
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
rep
repe
repne
repnz
repz
times
BR 2592476: Treat WAIT as a prefix even though it's really an instruction WAIT is technically an instruction, but from an assembler standpoint it behaves as if it had been a prefix. In particular, it has to be ordered *before* any real hardware prefixes.
2009-02-22 10:22:56 +08:00
wait
HLE: Implement the basic mechanism for XACQUIRE/XRELEASE This implements the mechanism for XACQUIRE/XRELEASE. It does not include the necessary annotations in insns.dat. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-25 13:51:46 +08:00
xacquire
xrelease
MPX: Add BND prefix for branch instructions BND prefix is used for adding bounds checking protection across flow control changes such as call, ret, jmp and jcc calls. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-10-16 10:38:51 +08:00
bnd
bnd: Add a new nobnd prefix bnd and nobnd prifixes can be used for each instruction line to direct whether bnd registers should be preserved or not. And those are also added as options for DEFAULT directive. Once bnd is set with default, DEFAULT BND, all bnd-prefix available instructions are prefixed with bnd. To override it, nobnd prefix can be used. In the other way, DEFAULT NOBND can disable DEFAULT BND and have nasm encode in the normal way. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-05 12:05:55 +08:00
nobnd
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_SPECIAL, 0, 0, S_*
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
abs
byte
dword
far
long
near
nosplit
Implement "oword" (128 bits) as a first-class size Implement oword, reso, do, as well as the SO flag to instructions. No instructions are actually flagged with SO yet, but this allows us to specify 128-bit sizes in instruction patterns.
2007-09-19 04:01:32 +08:00
oword
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
qword
rel
short
strict
to
tword
word
Add DY, YWORD, and the SY instruction flag Add the DY instruction, YWORD keyword, and an SY marker for instruction sizes. Add a few more AVX sample instructions.
2008-05-21 02:43:53 +08:00
yword
AVX-512: Add ZWORD keyword ZWORD (512 bits) keyword is added Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-22 10:29:11 +08:00
zword
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
Specifically if we encounter the PTR keyword Issue a specific suppressible warning if we encounter the PTR keyword. This usually indicates someone mistakenly using MASM syntax in NASM. This introduces a generic infrastructure for issuing warnings for such keywords. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2016-05-10 03:05:56 +08:00
% TOKEN_ID, 0, TFLAG_WARN, 0
ptr
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_FLOAT, 0, 0, 0
Support generating NaNs and infinities Support generating NaNs and infinities as part of floating-point constants.
2007-09-19 12:55:56 +08:00
__infinity__
__nan__
__qnan__
__snan__
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_FLOATIZE, 0, 0, FLOAT_{__float*__}
Use a 32-bit floating-point limb size; support 8-bit float Use a 32-bit limb size ("like a digit, but bigger") for floating-point conversion. This cuts the number of multiplications per constant by a factor of four. This means supporting fractional-limb-sized numbers, so while we're at it, add support for 8-bit floating point numbers (apparently used in graphics and in audio compression applications.)
2007-10-30 11:20:12 +08:00
__float8__
Support __float*__ for floating-point numbers in expressions Add special operators to allow the use of floating-point constants in contexts other than DW/DD/DQ/DT/DO. As part of this checkin, make MAX_KEYWORD generated by tokhash.pl, since it knows what all the keywords are so it can tell which one is the longest.
2007-09-25 03:30:54 +08:00
__float16__
__float32__
__float64__
__float80m__
__float80e__
__float128l__
__float128h__
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_STRFUNC, 0, 0, STRFUNC_{__*__}
Implement __utf16__() and __utf32__() for the DB family Implement __utf16__() and __utf32__() for the DB family of pseudo-instructions. Not yet implemented for evaluation context.
2008-06-15 07:53:48 +08:00
__utf16__
Add support for UTF-16BE and UTF-32BE Add support for bigendian UTF-16 and UTF-32, and (for symmetry) add explicitly littleendian operators. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-26 07:29:37 +08:00
__utf16le__
__utf16be__
Implement __utf16__() and __utf32__() for the DB family Implement __utf16__() and __utf32__() for the DB family of pseudo-instructions. Not yet implemented for evaluation context.
2008-06-15 07:53:48 +08:00
__utf32__
Add support for UTF-16BE and UTF-32BE Add support for bigendian UTF-16 and UTF-32, and (for symmetry) add explicitly littleendian operators. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-26 07:29:37 +08:00
__utf32le__
__utf32be__
Implement __utf16__() and __utf32__() for the DB family Implement __utf16__() and __utf32__() for the DB family of pseudo-instructions. Not yet implemented for evaluation context.
2008-06-15 07:53:48 +08:00
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_IFUNC, 0, 0, IFUNC_{__*__}
eval: add general support for "integer functions" and add ilog2*() Add general support in the function parser for "integer functions" (actually implemented as special unary operators, then wrapped in macros) and implement a family of integer logarithms. The only difference is the behavior on a non-power-of-two argument: ilog2[e] -- throw an error ilog2w -- throw a warning ilog2f -- round down to power of 2 ilog2c -- round up to power of 2 This is useful for back-converting from masks to bit values. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-01 01:25:37 +08:00
__ilog2e__
__ilog2w__
__ilog2f__
__ilog2c__
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_*, 0, 0, 0
tokens.dat: Data file containing alphanumeric tokens not in other .dats
2007-08-31 05:47:46 +08:00
seg
wrt
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
% TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO{1to*}
Sync to public Intel EAS version 021. * http://www.intel.com/software/isa * Signed-off-by: Mark Charney <mark.charney@intel.com>
2014-10-10 01:45:17 +08:00
1to2
1to4
AVX-512: Add support for parsing braces AVX-512 introduced new syntax using braces for decorators. Opmask, broadcat, rounding control use this new syntax. http://software.intel.com/sites/default/files/319433-015.pdf Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 11:46:18 +08:00
1to8
1to16
% TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_{*-sae}
rn-sae
rd-sae
ru-sae
rz-sae
% TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_*
sae
z
AVX-512: Add {evex} instruction prefix For instructions that can be encoded either in VEX or EVEX, {evex} forces nasm to encode in EVEX. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-10-26 10:29:53 +08:00
% TOKEN_PREFIX, 0, TFLAG_BRC, P_*
evex
Add {vex3} and {vex2} prefixes by analogy with {evex} Allow specifying {vex3} or {vex2} (the latter is currently always redundant, unless we end up with instructions at some point can be specified with legacy prefixes or VEX) to select a specific encoding of VEX-encoded instructions. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-11-29 04:11:24 +08:00
vex3
vex2
Reference in New Issue Copy Permalink