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cd1fe19886
(comment changes only). * sysdeps/ia64/fpu/e_acoshl.S: Likewise. * sysdeps/ia64/fpu/e_atanh.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_exp10.S: Likewise. * sysdeps/ia64/fpu/e_exp10f.S: Likewise. * sysdeps/ia64/fpu/e_exp2.S: Likewise. * sysdeps/ia64/fpu/e_exp2f.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_lgamma.S: Likewise. * sysdeps/ia64/fpu/libm_lgammaf.S: Likewise. * sysdeps/ia64/fpu/libm_lgammal.S: Likewise. * sysdeps/ia64/fpu/libm_sincos.S: Likewise. * sysdeps/ia64/fpu/libm_sincosf.S: Likewise. * sysdeps/ia64/fpu/s_asinh.S: Likewise. * sysdeps/ia64/fpu/s_atanl.S: Likewise. * sysdeps/ia64/fpu/s_cos.S: Likewise. * sysdeps/ia64/fpu/s_cosf.S: Likewise. * sysdeps/ia64/fpu/s_erf.S: Likewise. * sysdeps/ia64/fpu/s_erfc.S: Likewise. * sysdeps/ia64/fpu/s_erfcf.S: Likewise. * sysdeps/ia64/fpu/s_erfcl.S: Likewise. * sysdeps/ia64/fpu/s_erff.S: Likewise. * sysdeps/ia64/fpu/s_expm1.S: Likewise. * sysdeps/ia64/fpu/s_expm1f.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanh.S: Likewise. * sysdeps/ia64/fpu/s_tanhf.S: Likewise. * sysdeps/ia64/fpu/w_tgamma.S: Likewise. * sysdeps/ia64/fpu/w_tgammaf.S: Likewise. * sysdeps/ia64/fpu/w_tgammal.S: Likewise.
906 lines
24 KiB
ArmAsm
906 lines
24 KiB
ArmAsm
.file "sinh.s"
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// Copyright (c) 2000 - 2005, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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// History
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//==============================================================
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// 02/02/00 Initial version
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// 04/04/00 Unwind support added
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// 08/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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// 10/12/00 Update to set denormal operand and underflow flags
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// 01/22/01 Fixed to set inexact flag for small args.
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// 05/02/01 Reworked to improve speed of all paths
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 11/20/02 Improved speed with new algorithm
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// 03/31/05 Reformatted delimiters between data tables
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// API
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//==============================================================
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// double sinh(double)
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// Overview of operation
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//==============================================================
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// Case 1: 0 < |x| < 2^-60
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// Result = x, computed by x+sgn(x)*x^2) to handle flags and rounding
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//
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// Case 2: 2^-60 < |x| < 0.25
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// Evaluate sinh(x) by a 13th order polynomial
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// Care is take for the order of multiplication; and A1 is not exactly 1/3!,
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// A2 is not exactly 1/5!, etc.
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// sinh(x) = x + (A1*x^3 + A2*x^5 + A3*x^7 + A4*x^9 + A5*x^11 + A6*x^13)
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//
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// Case 3: 0.25 < |x| < 710.47586
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// Algorithm is based on the identity sinh(x) = ( exp(x) - exp(-x) ) / 2.
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// The algorithm for exp is described as below. There are a number of
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// economies from evaluating both exp(x) and exp(-x). Although we
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// are evaluating both quantities, only where the quantities diverge do we
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// duplicate the computations. The basic algorithm for exp(x) is described
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// below.
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//
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// Take the input x. w is "how many log2/128 in x?"
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// w = x * 128/log2
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// n = int(w)
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// x = n log2/128 + r + delta
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// n = 128M + index_1 + 2^4 index_2
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// x = M log2 + (log2/128) index_1 + (log2/8) index_2 + r + delta
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// exp(x) = 2^M 2^(index_1/128) 2^(index_2/8) exp(r) exp(delta)
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// Construct 2^M
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// Get 2^(index_1/128) from table_1;
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// Get 2^(index_2/8) from table_2;
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// Calculate exp(r) by 5th order polynomial
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// r = x - n (log2/128)_high
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// delta = - n (log2/128)_low
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// Calculate exp(delta) as 1 + delta
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// Special values
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//==============================================================
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// sinh(+0) = +0
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// sinh(-0) = -0
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// sinh(+qnan) = +qnan
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// sinh(-qnan) = -qnan
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// sinh(+snan) = +qnan
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// sinh(-snan) = -qnan
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// sinh(-inf) = -inf
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// sinh(+inf) = +inf
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// Overflow and Underflow
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//=======================
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// sinh(x) = largest double normal when
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// |x| = 710.47586 = 0x408633ce8fb9f87d
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//
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// Underflow is handled as described in case 1 above
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// Registers used
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//==============================================================
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// Floating Point registers used:
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// f8, input, output
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// f6 -> f15, f32 -> f61
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// General registers used:
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// r14 -> r40
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// Predicate registers used:
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// p6 -> p15
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// Assembly macros
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//==============================================================
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rRshf = r14
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rN_neg = r14
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rAD_TB1 = r15
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rAD_TB2 = r16
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rAD_P = r17
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rN = r18
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rIndex_1 = r19
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rIndex_2_16 = r20
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rM = r21
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rBiased_M = r21
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rSig_inv_ln2 = r22
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rIndex_1_neg = r22
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rExp_bias = r23
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rExp_bias_minus_1 = r23
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rExp_mask = r24
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rTmp = r24
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rGt_ln = r24
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rIndex_2_16_neg = r24
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rM_neg = r25
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rBiased_M_neg = r25
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rRshf_2to56 = r26
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rAD_T1_neg = r26
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rExp_2tom56 = r28
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rAD_T2_neg = r28
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rAD_T1 = r29
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rAD_T2 = r30
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rSignexp_x = r31
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rExp_x = r31
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GR_SAVE_B0 = r33
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GR_SAVE_PFS = r34
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GR_SAVE_GP = r35
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GR_Parameter_X = r37
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GR_Parameter_Y = r38
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GR_Parameter_RESULT = r39
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GR_Parameter_TAG = r40
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FR_X = f10
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FR_Y = f1
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FR_RESULT = f8
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fRSHF_2TO56 = f6
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fINV_LN2_2TO63 = f7
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fW_2TO56_RSH = f9
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f2TOM56 = f11
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fP5 = f12
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fP4 = f13
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fP3 = f14
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fP2 = f15
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fLn2_by_128_hi = f33
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fLn2_by_128_lo = f34
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fRSHF = f35
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fNfloat = f36
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fNormX = f37
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fR = f38
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fF = f39
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fRsq = f40
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f2M = f41
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fS1 = f42
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fT1 = f42
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fS2 = f43
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fT2 = f43
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fS = f43
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fWre_urm_f8 = f44
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fAbsX = f44
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fMIN_DBL_OFLOW_ARG = f45
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fMAX_DBL_NORM_ARG = f46
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fXsq = f47
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fX4 = f48
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fGt_pln = f49
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fTmp = f49
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fP54 = f50
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fP5432 = f50
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fP32 = f51
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fP = f52
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fP54_neg = f53
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fP5432_neg = f53
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fP32_neg = f54
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fP_neg = f55
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fF_neg = f56
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f2M_neg = f57
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fS1_neg = f58
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fT1_neg = f58
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fS2_neg = f59
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fT2_neg = f59
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fS_neg = f59
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fExp = f60
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fExp_neg = f61
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fA6 = f50
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fA65 = f50
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fA6543 = f50
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fA654321 = f50
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fA5 = f51
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fA4 = f52
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fA43 = f52
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fA3 = f53
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fA2 = f54
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fA21 = f54
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fA1 = f55
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fX3 = f56
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// Data tables
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//==============================================================
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RODATA
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.align 16
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// ************* DO NOT CHANGE ORDER OF THESE TABLES ********************
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// double-extended 1/ln(2)
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// 3fff b8aa 3b29 5c17 f0bb be87fed0691d3e88
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// 3fff b8aa 3b29 5c17 f0bc
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// For speed the significand will be loaded directly with a movl and setf.sig
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// and the exponent will be bias+63 instead of bias+0. Thus subsequent
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// computations need to scale appropriately.
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// The constant 128/ln(2) is needed for the computation of w. This is also
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// obtained by scaling the computations.
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//
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// Two shifting constants are loaded directly with movl and setf.d.
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// 1. fRSHF_2TO56 = 1.1000..00 * 2^(63-7)
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// This constant is added to x*1/ln2 to shift the integer part of
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// x*128/ln2 into the rightmost bits of the significand.
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// The result of this fma is fW_2TO56_RSH.
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// 2. fRSHF = 1.1000..00 * 2^(63)
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// This constant is subtracted from fW_2TO56_RSH * 2^(-56) to give
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// the integer part of w, n, as a floating-point number.
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// The result of this fms is fNfloat.
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LOCAL_OBJECT_START(exp_table_1)
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data8 0x408633ce8fb9f87e // smallest dbl overflow arg
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data8 0x408633ce8fb9f87d // largest dbl arg to give normal dbl result
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data8 0xb17217f7d1cf79ab , 0x00003ff7 // ln2/128 hi
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data8 0xc9e3b39803f2f6af , 0x00003fb7 // ln2/128 lo
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//
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// Table 1 is 2^(index_1/128) where
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// index_1 goes from 0 to 15
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//
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data8 0x8000000000000000 , 0x00003FFF
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data8 0x80B1ED4FD999AB6C , 0x00003FFF
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data8 0x8164D1F3BC030773 , 0x00003FFF
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data8 0x8218AF4373FC25EC , 0x00003FFF
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data8 0x82CD8698AC2BA1D7 , 0x00003FFF
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data8 0x8383594EEFB6EE37 , 0x00003FFF
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data8 0x843A28C3ACDE4046 , 0x00003FFF
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data8 0x84F1F656379C1A29 , 0x00003FFF
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data8 0x85AAC367CC487B15 , 0x00003FFF
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data8 0x8664915B923FBA04 , 0x00003FFF
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data8 0x871F61969E8D1010 , 0x00003FFF
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data8 0x87DB357FF698D792 , 0x00003FFF
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data8 0x88980E8092DA8527 , 0x00003FFF
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data8 0x8955EE03618E5FDD , 0x00003FFF
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data8 0x8A14D575496EFD9A , 0x00003FFF
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data8 0x8AD4C6452C728924 , 0x00003FFF
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LOCAL_OBJECT_END(exp_table_1)
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// Table 2 is 2^(index_1/8) where
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// index_2 goes from 0 to 7
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LOCAL_OBJECT_START(exp_table_2)
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data8 0x8000000000000000 , 0x00003FFF
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data8 0x8B95C1E3EA8BD6E7 , 0x00003FFF
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data8 0x9837F0518DB8A96F , 0x00003FFF
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data8 0xA5FED6A9B15138EA , 0x00003FFF
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data8 0xB504F333F9DE6484 , 0x00003FFF
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data8 0xC5672A115506DADD , 0x00003FFF
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data8 0xD744FCCAD69D6AF4 , 0x00003FFF
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data8 0xEAC0C6E7DD24392F , 0x00003FFF
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LOCAL_OBJECT_END(exp_table_2)
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LOCAL_OBJECT_START(exp_p_table)
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data8 0x3f8111116da21757 //P5
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data8 0x3fa55555d787761c //P4
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data8 0x3fc5555555555414 //P3
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data8 0x3fdffffffffffd6a //P2
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LOCAL_OBJECT_END(exp_p_table)
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LOCAL_OBJECT_START(sinh_p_table)
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data8 0xB08AF9AE78C1239F, 0x00003FDE // A6
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data8 0xB8EF1D28926D8891, 0x00003FEC // A4
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data8 0x8888888888888412, 0x00003FF8 // A2
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data8 0xD732377688025BE9, 0x00003FE5 // A5
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data8 0xD00D00D00D4D39F2, 0x00003FF2 // A3
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data8 0xAAAAAAAAAAAAAAAB, 0x00003FFC // A1
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LOCAL_OBJECT_END(sinh_p_table)
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.section .text
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GLOBAL_IEEE754_ENTRY(sinh)
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{ .mlx
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getf.exp rSignexp_x = f8 // Must recompute if x unorm
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movl rSig_inv_ln2 = 0xb8aa3b295c17f0bc // significand of 1/ln2
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}
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{ .mlx
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addl rAD_TB1 = @ltoff(exp_table_1), gp
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movl rRshf_2to56 = 0x4768000000000000 // 1.10000 2^(63+56)
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}
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;;
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{ .mfi
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ld8 rAD_TB1 = [rAD_TB1]
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fclass.m p6,p0 = f8,0x0b // Test for x=unorm
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mov rExp_mask = 0x1ffff
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}
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{ .mfi
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mov rExp_bias = 0xffff
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fnorm.s1 fNormX = f8
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mov rExp_2tom56 = 0xffff-56
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}
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;;
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// Form two constants we need
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// 1/ln2 * 2^63 to compute w = x * 1/ln2 * 128
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// 1.1000..000 * 2^(63+63-7) to right shift int(w) into the significand
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{ .mfi
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setf.sig fINV_LN2_2TO63 = rSig_inv_ln2 // form 1/ln2 * 2^63
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fclass.m p8,p0 = f8,0x07 // Test for x=0
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nop.i 999
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}
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{ .mlx
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setf.d fRSHF_2TO56 = rRshf_2to56 // Form const 1.100 * 2^(63+56)
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movl rRshf = 0x43e8000000000000 // 1.10000 2^63 for right shift
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}
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;;
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{ .mfi
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ldfpd fMIN_DBL_OFLOW_ARG, fMAX_DBL_NORM_ARG = [rAD_TB1],16
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fclass.m p10,p0 = f8,0x1e3 // Test for x=inf, nan, NaT
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nop.i 0
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}
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{ .mfb
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setf.exp f2TOM56 = rExp_2tom56 // form 2^-56 for scaling Nfloat
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nop.f 0
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(p6) br.cond.spnt SINH_UNORM // Branch if x=unorm
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}
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;;
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SINH_COMMON:
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{ .mfi
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ldfe fLn2_by_128_hi = [rAD_TB1],16
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nop.f 0
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nop.i 0
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}
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{ .mfb
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setf.d fRSHF = rRshf // Form right shift const 1.100 * 2^63
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nop.f 0
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(p8) br.ret.spnt b0 // Exit for x=0, result=x
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}
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;;
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{ .mfi
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ldfe fLn2_by_128_lo = [rAD_TB1],16
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nop.f 0
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nop.i 0
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}
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{ .mfb
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and rExp_x = rExp_mask, rSignexp_x // Biased exponent of x
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(p10) fma.d.s0 f8 = f8,f1,f0 // Result if x=inf, nan, NaT
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(p10) br.ret.spnt b0 // quick exit for x=inf, nan, NaT
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}
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;;
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// After that last load rAD_TB1 points to the beginning of table 1
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{ .mfi
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nop.m 0
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fcmp.eq.s0 p6,p0 = f8, f0 // Dummy to set D
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sub rExp_x = rExp_x, rExp_bias // True exponent of x
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}
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;;
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{ .mfi
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nop.m 0
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fmerge.s fAbsX = f0, fNormX // Form |x|
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nop.i 0
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}
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{ .mfb
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cmp.gt p7, p0 = -2, rExp_x // Test |x| < 2^(-2)
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fma.s1 fXsq = fNormX, fNormX, f0 // x*x for small path
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(p7) br.cond.spnt SINH_SMALL // Branch if 0 < |x| < 2^-2
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|
}
|
|
;;
|
|
|
|
// W = X * Inv_log2_by_128
|
|
// By adding 1.10...0*2^63 we shift and get round_int(W) in significand.
|
|
// We actually add 1.10...0*2^56 to X * Inv_log2 to do the same thing.
|
|
|
|
{ .mfi
|
|
add rAD_P = 0x180, rAD_TB1
|
|
fma.s1 fW_2TO56_RSH = fNormX, fINV_LN2_2TO63, fRSHF_2TO56
|
|
add rAD_TB2 = 0x100, rAD_TB1
|
|
}
|
|
;;
|
|
|
|
// Divide arguments into the following categories:
|
|
// Certain Safe - 0.25 <= |x| <= MAX_DBL_NORM_ARG
|
|
// Possible Overflow p14 - MAX_DBL_NORM_ARG < |x| < MIN_DBL_OFLOW_ARG
|
|
// Certain Overflow p15 - MIN_DBL_OFLOW_ARG <= |x| < +inf
|
|
//
|
|
// If the input is really a double arg, then there will never be
|
|
// "Possible Overflow" arguments.
|
|
//
|
|
|
|
{ .mfi
|
|
ldfpd fP5, fP4 = [rAD_P] ,16
|
|
fcmp.ge.s1 p15,p14 = fAbsX,fMIN_DBL_OFLOW_ARG
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
// Nfloat = round_int(W)
|
|
// The signficand of fW_2TO56_RSH contains the rounded integer part of W,
|
|
// as a twos complement number in the lower bits (that is, it may be negative).
|
|
// That twos complement number (called N) is put into rN.
|
|
|
|
// Since fW_2TO56_RSH is scaled by 2^56, it must be multiplied by 2^-56
|
|
// before the shift constant 1.10000 * 2^63 is subtracted to yield fNfloat.
|
|
// Thus, fNfloat contains the floating point version of N
|
|
|
|
{ .mfi
|
|
ldfpd fP3, fP2 = [rAD_P]
|
|
(p14) fcmp.gt.unc.s1 p14,p0 = fAbsX,fMAX_DBL_NORM_ARG
|
|
nop.i 0
|
|
}
|
|
{ .mfb
|
|
nop.m 0
|
|
fms.s1 fNfloat = fW_2TO56_RSH, f2TOM56, fRSHF
|
|
(p15) br.cond.spnt SINH_CERTAIN_OVERFLOW
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
getf.sig rN = fW_2TO56_RSH
|
|
nop.f 0
|
|
mov rExp_bias_minus_1 = 0xfffe
|
|
}
|
|
;;
|
|
|
|
// rIndex_1 has index_1
|
|
// rIndex_2_16 has index_2 * 16
|
|
// rBiased_M has M
|
|
|
|
// rM has true M
|
|
// r = x - Nfloat * ln2_by_128_hi
|
|
// f = 1 - Nfloat * ln2_by_128_lo
|
|
{ .mfi
|
|
and rIndex_1 = 0x0f, rN
|
|
fnma.s1 fR = fNfloat, fLn2_by_128_hi, fNormX
|
|
shr rM = rN, 0x7
|
|
}
|
|
{ .mfi
|
|
and rIndex_2_16 = 0x70, rN
|
|
fnma.s1 fF = fNfloat, fLn2_by_128_lo, f1
|
|
sub rN_neg = r0, rN
|
|
}
|
|
;;
|
|
|
|
{ .mmi
|
|
and rIndex_1_neg = 0x0f, rN_neg
|
|
add rBiased_M = rExp_bias_minus_1, rM
|
|
shr rM_neg = rN_neg, 0x7
|
|
}
|
|
{ .mmi
|
|
and rIndex_2_16_neg = 0x70, rN_neg
|
|
add rAD_T2 = rAD_TB2, rIndex_2_16
|
|
shladd rAD_T1 = rIndex_1, 4, rAD_TB1
|
|
}
|
|
;;
|
|
|
|
// rAD_T1 has address of T1
|
|
// rAD_T2 has address if T2
|
|
|
|
{ .mmi
|
|
setf.exp f2M = rBiased_M
|
|
ldfe fT2 = [rAD_T2]
|
|
nop.i 0
|
|
}
|
|
{ .mmi
|
|
add rBiased_M_neg = rExp_bias_minus_1, rM_neg
|
|
add rAD_T2_neg = rAD_TB2, rIndex_2_16_neg
|
|
shladd rAD_T1_neg = rIndex_1_neg, 4, rAD_TB1
|
|
}
|
|
;;
|
|
|
|
// Create Scale = 2^M
|
|
// Load T1 and T2
|
|
{ .mmi
|
|
ldfe fT1 = [rAD_T1]
|
|
nop.m 0
|
|
nop.i 0
|
|
}
|
|
{ .mmf
|
|
setf.exp f2M_neg = rBiased_M_neg
|
|
ldfe fT2_neg = [rAD_T2_neg]
|
|
fma.s1 fF_neg = fNfloat, fLn2_by_128_lo, f1
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fRsq = fR, fR, f0
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
ldfe fT1_neg = [rAD_T1_neg]
|
|
fma.s1 fP54 = fR, fP5, fP4
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fP32 = fR, fP3, fP2
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fnma.s1 fP54_neg = fR, fP5, fP4
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fnma.s1 fP32_neg = fR, fP3, fP2
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fP5432 = fRsq, fP54, fP32
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS2 = fF,fT2,f0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS1 = f2M,fT1,f0
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fP5432_neg = fRsq, fP54_neg, fP32_neg
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS1_neg = f2M_neg,fT1_neg,f0
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS2_neg = fF_neg,fT2_neg,f0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fP = fRsq, fP5432, fR
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS = fS1,fS2,f0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fms.s1 fP_neg = fRsq, fP5432_neg, fR
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fS_neg = fS1_neg,fS2_neg,f0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 0
|
|
fmpy.s0 fTmp = fLn2_by_128_lo, fLn2_by_128_lo // Force inexact
|
|
(p14) br.cond.spnt SINH_POSSIBLE_OVERFLOW
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fExp = fS, fP, fS
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fExp_neg = fS_neg, fP_neg, fS_neg
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 0
|
|
fms.d.s0 f8 = fExp, f1, fExp_neg
|
|
br.ret.sptk b0 // Normal path exit
|
|
}
|
|
;;
|
|
|
|
// Here if 0 < |x| < 0.25
|
|
SINH_SMALL:
|
|
{ .mfi
|
|
add rAD_T1 = 0x1a0, rAD_TB1
|
|
fcmp.lt.s1 p7, p8 = fNormX, f0 // Test sign of x
|
|
cmp.gt p6, p0 = -60, rExp_x // Test |x| < 2^(-60)
|
|
}
|
|
{ .mfi
|
|
add rAD_T2 = 0x1d0, rAD_TB1
|
|
nop.f 0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mmb
|
|
ldfe fA6 = [rAD_T1],16
|
|
ldfe fA5 = [rAD_T2],16
|
|
(p6) br.cond.spnt SINH_VERY_SMALL // Branch if |x| < 2^(-60)
|
|
}
|
|
;;
|
|
|
|
{ .mmi
|
|
ldfe fA4 = [rAD_T1],16
|
|
ldfe fA3 = [rAD_T2],16
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mmi
|
|
ldfe fA2 = [rAD_T1]
|
|
ldfe fA1 = [rAD_T2]
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fX3 = fNormX, fXsq, f0
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fX4 = fXsq, fXsq, f0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fA65 = fXsq, fA6, fA5
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fA43 = fXsq, fA4, fA3
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fA21 = fXsq, fA2, fA1
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fA6543 = fX4, fA65, fA43
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fma.s1 fA654321 = fX4, fA6543, fA21
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
// Dummy multiply to generate inexact
|
|
{ .mfi
|
|
nop.m 0
|
|
fmpy.s0 fTmp = fA6, fA6
|
|
nop.i 0
|
|
}
|
|
{ .mfb
|
|
nop.m 0
|
|
fma.d.s0 f8 = fA654321, fX3, fNormX
|
|
br.ret.sptk b0 // Exit if 2^-60 < |x| < 0.25
|
|
}
|
|
;;
|
|
|
|
SINH_VERY_SMALL:
|
|
// Here if 0 < |x| < 2^-60
|
|
// Compute result by x + sgn(x)*x^2 to get properly rounded result
|
|
.pred.rel "mutex",p7,p8
|
|
{ .mfi
|
|
nop.m 0
|
|
(p7) fnma.d.s0 f8 = fNormX, fNormX, fNormX // If x<0 result ~ x-x^2
|
|
nop.i 0
|
|
}
|
|
{ .mfb
|
|
nop.m 0
|
|
(p8) fma.d.s0 f8 = fNormX, fNormX, fNormX // If x>0 result ~ x+x^2
|
|
br.ret.sptk b0 // Exit if |x| < 2^-60
|
|
}
|
|
;;
|
|
|
|
|
|
SINH_POSSIBLE_OVERFLOW:
|
|
|
|
// Here if fMAX_DBL_NORM_ARG < |x| < fMIN_DBL_OFLOW_ARG
|
|
// This cannot happen if input is a double, only if input higher precision.
|
|
// Overflow is a possibility, not a certainty.
|
|
|
|
// Recompute result using status field 2 with user's rounding mode,
|
|
// and wre set. If result is larger than largest double, then we have
|
|
// overflow
|
|
|
|
{ .mfi
|
|
mov rGt_ln = 0x103ff // Exponent for largest dbl + 1 ulp
|
|
fsetc.s2 0x7F,0x42 // Get user's round mode, set wre
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
setf.exp fGt_pln = rGt_ln // Create largest double + 1 ulp
|
|
fma.d.s2 fWre_urm_f8 = fS, fP, fS // Result with wre set
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fsetc.s2 0x7F,0x40 // Turn off wre in sf2
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
fcmp.ge.s1 p6, p0 = fWre_urm_f8, fGt_pln // Test for overflow
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 0
|
|
nop.f 0
|
|
(p6) br.cond.spnt SINH_CERTAIN_OVERFLOW // Branch if overflow
|
|
}
|
|
;;
|
|
|
|
{ .mfb
|
|
nop.m 0
|
|
fma.d.s0 f8 = fS, fP, fS
|
|
br.ret.sptk b0 // Exit if really no overflow
|
|
}
|
|
;;
|
|
|
|
SINH_CERTAIN_OVERFLOW:
|
|
{ .mfi
|
|
sub rTmp = rExp_mask, r0, 1
|
|
fcmp.lt.s1 p6, p7 = fNormX, f0 // Test for x < 0
|
|
nop.i 0
|
|
}
|
|
;;
|
|
|
|
{ .mmf
|
|
alloc r32=ar.pfs,1,4,4,0
|
|
setf.exp fTmp = rTmp
|
|
fmerge.s FR_X = f8,f8
|
|
}
|
|
;;
|
|
|
|
{ .mfi
|
|
mov GR_Parameter_TAG = 127
|
|
(p6) fnma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and -INF result
|
|
nop.i 0
|
|
}
|
|
{ .mfb
|
|
nop.m 0
|
|
(p7) fma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
|
|
br.cond.sptk __libm_error_region
|
|
}
|
|
;;
|
|
|
|
// Here if x unorm
|
|
SINH_UNORM:
|
|
{ .mfb
|
|
getf.exp rSignexp_x = fNormX // Must recompute if x unorm
|
|
fcmp.eq.s0 p6, p0 = f8, f0 // Set D flag
|
|
br.cond.sptk SINH_COMMON
|
|
}
|
|
;;
|
|
|
|
GLOBAL_IEEE754_END(sinh)
|
|
|
|
|
|
LOCAL_LIBM_ENTRY(__libm_error_region)
|
|
.prologue
|
|
{ .mfi
|
|
add GR_Parameter_Y=-32,sp // Parameter 2 value
|
|
nop.f 0
|
|
.save ar.pfs,GR_SAVE_PFS
|
|
mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
|
|
}
|
|
{ .mfi
|
|
.fframe 64
|
|
add sp=-64,sp // Create new stack
|
|
nop.f 0
|
|
mov GR_SAVE_GP=gp // Save gp
|
|
};;
|
|
{ .mmi
|
|
stfd [GR_Parameter_Y] = FR_Y,16 // STORE Parameter 2 on stack
|
|
add GR_Parameter_X = 16,sp // Parameter 1 address
|
|
.save b0, GR_SAVE_B0
|
|
mov GR_SAVE_B0=b0 // Save b0
|
|
};;
|
|
.body
|
|
{ .mib
|
|
stfd [GR_Parameter_X] = FR_X // STORE Parameter 1 on stack
|
|
add GR_Parameter_RESULT = 0,GR_Parameter_Y // Parameter 3 address
|
|
nop.b 0
|
|
}
|
|
{ .mib
|
|
stfd [GR_Parameter_Y] = FR_RESULT // STORE Parameter 3 on stack
|
|
add GR_Parameter_Y = -16,GR_Parameter_Y
|
|
br.call.sptk b0=__libm_error_support# // Call error handling function
|
|
};;
|
|
{ .mmi
|
|
add GR_Parameter_RESULT = 48,sp
|
|
nop.m 0
|
|
nop.i 0
|
|
};;
|
|
{ .mmi
|
|
ldfd f8 = [GR_Parameter_RESULT] // Get return result off stack
|
|
.restore sp
|
|
add sp = 64,sp // Restore stack pointer
|
|
mov b0 = GR_SAVE_B0 // Restore return address
|
|
};;
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP // Restore gp
|
|
mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
|
|
br.ret.sptk b0 // Return
|
|
};;
|
|
|
|
LOCAL_LIBM_END(__libm_error_region)
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|