Vidya Ranganathan f360f94a05 PowerPC: strncpy/stpncpy optimization for PPC64/POWER7 ... The optimization is achieved by following techniques: > data alignment [gain from aligned memory access on read/write] > POWER7 gains performance with loop unrolling/unwinding [gain by reduction of branch penalty]. > zero padding done by calling optimized memset		2014-05-06 09:54:25 -05:00
..
970
a2
bits
cell
fpu	Fix s_copysign stack temp for PowerPC64 ELFv2	2014-04-01 14:10:22 +10:30
multiarch	PowerPC: strncpy/stpncpy optimization for PPC64/POWER7	2014-05-06 09:54:25 -05:00
power4
power5	PowerPC: Fix --disable-multi-arch builds	2014-04-09 06:22:53 -05:00
power5+	PowerPC: Fix --disable-multi-arch builds	2014-04-09 06:22:53 -05:00
power6
power6x	PowerPC: Fix --disable-multi-arch builds	2014-04-09 06:22:53 -05:00
power7	PowerPC: strncpy/stpncpy optimization for PPC64/POWER7	2014-05-06 09:54:25 -05:00
power8	PowerPC: Fix --disable-multi-arch builds	2014-04-09 06:22:53 -05:00
__longjmp-common.S
__longjmp.S
addmul_1.S
backtrace.c
bsd-_setjmp.S
bsd-setjmp.S
bzero.S
configure
configure.ac
crti.S
crtn.S
dl-dtprocnum.h
dl-irel.h
dl-machine.c
dl-machine.h
dl-trampoline.S
entry.h
ffsll.c
hp-timing.c
hp-timing.h
Implies
lshift.S
Makefile
memcpy.S
memset.S
mul_1.S
ppc-mcount.S
register-dump.h
rtld-memset.c
setjmp-common.S
setjmp.S
stackguard-macros.h
start.S	Fix reference to toc symbol.	2014-04-02 13:40:21 +10:30
stpcpy.S
strchr.S
strcmp.S
strcpy.S
strlen.S
strncmp.S
submul_1.S
sysdep.h
tls-macros.h
tst-audit.h