glibc/sysdeps/aarch64/fpu
Tejas Belagod 05844d18f7 AArch64: Reset HWCAP2_AFP bits in FPCR for default fenv
The AFP feature (Alternate floating-point behavior) was added in armv8.7 and
introduced new FPCR bits.

Currently, HWCAP2_AFP bits (bit 0, 1, 2) in FPCR are preserved when fenv is
set to default environment.  This is a deviation from standard behaviour.
Clear these bits when setting the fenv to default.

There is no libc API to modify the new FPCR bits.  Restoring those bits matters
if the user changed them directly.
2022-07-05 14:01:17 +01:00
..
fclrexcpt.c
fedisblxcpt.c
feenablxcpt.c
fegetenv.c
fegetexcept.c
fegetmode.c
fegetround.c
feholdexcpt.c
fenv_private.h
fesetenv.c
fesetexcept.c
fesetmode.c
fesetround.c
feupdateenv.c
fgetexcptflg.c
fpu_control.h
fraiseexcpt.c
fsetexcptflg.c
ftestexcept.c
get-rounding-mode.h
math_private.h
math-barriers.h
math-use-builtins-ceil.h
math-use-builtins-floor.h
math-use-builtins-fma.h
math-use-builtins-fmax.h
math-use-builtins-fmin.h
math-use-builtins-nearbyint.h
math-use-builtins-rint.h
math-use-builtins-round.h
math-use-builtins-sqrt.h
math-use-builtins-trunc.h
s_llrint.c
s_llrintf.c
s_llround.c
s_llroundf.c
s_lrint.c
s_lrintf.c
s_lround.c
s_lroundf.c
s_roundeven.c
s_roundevenf.c