glibc/sysdeps/powerpc/powerpc64
Adhemerval Zanella ba9cc0714e PowerPC: strncat optimization for PPC64
The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
   cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.
2014-03-10 07:25:09 -05:00
..
970
a2
bits
cell
fpu PowerPC: llround/llroundf POWER8 optimization 2014-02-27 12:58:33 -06:00
multiarch PowerPC: strncat optimization for PPC64 2014-03-10 07:25:09 -05:00
power4
power5
power5+
power6
power6x
power7 PowerPC: strncat optimization for PPC64 2014-03-10 07:25:09 -05:00
power8 PowerPC: llround/llroundf POWER8 optimization 2014-02-27 12:58:33 -06:00
__longjmp-common.S
__longjmp.S
addmul_1.S
backtrace.c
bsd-_setjmp.S
bsd-setjmp.S
bzero.S
configure
configure.ac
crti.S
crtn.S
dl-dtprocnum.h
dl-irel.h
dl-machine.c
dl-machine.h
dl-trampoline.S
entry.h
ffsll.c
hp-timing.c
hp-timing.h
Implies
lshift.S
Makefile
memcpy.S
memset.S
mul_1.S
ppc-mcount.S
register-dump.h
rtld-memset.c
setjmp-common.S
setjmp.S
stackguard-macros.h
start.S
stpcpy.S
strchr.S
strcmp.S
strcpy.S
strlen.S
strncmp.S
submul_1.S
sysdep.h
tls-macros.h
tst-audit.h