Siddhesh Poyarekar b7f8815617 x86 long double: Support pseudo numbers in fpclassifyl ... Also move sysdeps/i386/fpu/s_fpclassifyl.c to sysdeps/x86/fpu/s_fpclassifyl.c and remove sysdeps/x86_64/fpu/s_fpclassifyl.c Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>		2020-12-24 06:05:26 +05:30
..
bits
fpu	x86 long double: Support pseudo numbers in fpclassifyl	2020-12-24 06:05:26 +05:30
include	x86: Initialize CPU info via IFUNC relocation [BZ 26203]	2020-10-16 16:17:53 -07:00
nptl
sys/platform	<sys/platform/x86.h>: Add Intel LAM support	2020-12-22 03:45:47 -08:00
__longjmp_cancel.S
atomic-machine.h	x86: Remove UP macro. Define LOCK_PREFIX unconditionally.	2020-11-13 15:20:03 +01:00
cacheinfo.c	x86: Initialize CPU info via IFUNC relocation [BZ 26203]	2020-10-16 16:17:53 -07:00
cacheinfo.h	x86: Restore processing of cache size tunables in init_cacheinfo	2020-10-28 15:53:26 +01:00
cet-control.h
check-cet.awk
configure
configure.ac
cpu-features-offsets.sym
cpu-features.c	x86: Set RDRAND usable if CPU supports RDRAND	2020-12-04 05:03:42 -08:00
cpu-tunables.c
dl-cacheinfo.h	x86: Initialize CPU info via IFUNC relocation [BZ 26203]	2020-10-16 16:17:53 -07:00
dl-cet.c
dl-get-cpu-features.c	x86: Initialize CPU info via IFUNC relocation [BZ 26203]	2020-10-16 16:17:53 -07:00
dl-hwcap.h
dl-lookupcfg.h
dl-procinfo.c
dl-procinfo.h
dl-procruntime.c
dl-prop.h	elf: Pass the fd to note processing	2020-12-11 15:45:37 +00:00
dl-tunables.list	x86: Remove the default REP MOVSB threshold tunable value [BZ #27061]	2020-12-14 07:31:00 -08:00
elf-initfini.h
elide.h
float128-abi.h
fpu_control.h
hp-timing.h
init-arch.h
jmp_buf-ssp.sym
ldbl2mpn.c	x86: Harden printf against non-normal long double values (bug 26649)	2020-09-22 19:07:49 +02:00
ldsodefs.h
libc-start.c	x86: Initialize CPU info via IFUNC relocation [BZ 26203]	2020-10-16 16:17:53 -07:00
libc-start.h
link_map.h
linkmap.h
longjmp.c
Makeconfig
Makefile	x86: Harden printf against non-normal long double values (bug 26649)	2020-09-22 19:07:49 +02:00
string_private.h
sysdep.h
tininess.h
tst-cet-legacy-1.c
tst-cet-legacy-1a.c
tst-cet-legacy-2.c
tst-cet-legacy-2a.c
tst-cet-legacy-3.c
tst-cet-legacy-4.c
tst-cet-legacy-4a.c
tst-cet-legacy-4b.c
tst-cet-legacy-4c.c
tst-cet-legacy-5.c
tst-cet-legacy-5a.c
tst-cet-legacy-5b.c
tst-cet-legacy-6.c
tst-cet-legacy-6a.c
tst-cet-legacy-6b.c
tst-cet-legacy-7.c
tst-cet-legacy-8.c
tst-cet-legacy-mod-1.c
tst-cet-legacy-mod-2.c
tst-cet-legacy-mod-4.c
tst-cet-legacy-mod-5.c
tst-cet-legacy-mod-5a.c
tst-cet-legacy-mod-5b.c
tst-cet-legacy-mod-5c.c
tst-cet-legacy-mod-6.c
tst-cet-legacy-mod-6a.c
tst-cet-legacy-mod-6b.c
tst-cet-legacy-mod-6c.c
tst-cet-legacy-mod-6d.c
tst-cpu-features-cpuinfo.c
tst-cpu-features-supports.c	x86: Adjust tst-cpu-features-supports.c for GCC 11	2020-12-04 05:12:55 -08:00
tst-get-cpu-features-static.c
tst-get-cpu-features.c	<sys/platform/x86.h>: Add Intel LAM support	2020-12-22 03:45:47 -08:00
tst-ldbl-nonnormal-printf.c	x86: Harden printf against non-normal long double values (bug 26649)	2020-09-22 19:07:49 +02:00
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