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git://sourceware.org/git/glibc.git
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277 lines
8.3 KiB
C
277 lines
8.3 KiB
C
/* Partial PLT profile trampoline to save and restore x86-64 vector
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registers.
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Copyright (C) 2009, 2011 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#ifdef RESTORE_AVX
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/* This is to support AVX audit modules. */
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vmovdqu %ymm0, (LR_VECTOR_OFFSET)(%rsp)
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vmovdqu %ymm1, (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp)
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vmovdqu %ymm2, (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
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vmovdqu %ymm3, (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
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vmovdqu %ymm4, (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
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vmovdqu %ymm5, (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
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vmovdqu %ymm6, (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
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vmovdqu %ymm7, (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
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/* Save xmm0-xmm7 registers to detect if any of them are
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changed by audit module. */
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vmovdqa %xmm0, (LR_SIZE)(%rsp)
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vmovdqa %xmm1, (LR_SIZE + XMM_SIZE)(%rsp)
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vmovdqa %xmm2, (LR_SIZE + XMM_SIZE*2)(%rsp)
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vmovdqa %xmm3, (LR_SIZE + XMM_SIZE*3)(%rsp)
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vmovdqa %xmm4, (LR_SIZE + XMM_SIZE*4)(%rsp)
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vmovdqa %xmm5, (LR_SIZE + XMM_SIZE*5)(%rsp)
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vmovdqa %xmm6, (LR_SIZE + XMM_SIZE*6)(%rsp)
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vmovdqa %xmm7, (LR_SIZE + XMM_SIZE*7)(%rsp)
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#endif
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movq %rsp, %rcx # La_x86_64_regs pointer to %rcx.
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movq 48(%rbx), %rdx # Load return address if needed.
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movq 40(%rbx), %rsi # Copy args pushed by PLT in register.
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movq 32(%rbx), %rdi # %rdi: link_map, %rsi: reloc_index
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leaq 16(%rbx), %r8
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call _dl_profile_fixup # Call resolver.
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movq %rax, %r11 # Save return value.
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movq 8(%rbx), %rax # Get back register content.
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movq LR_RDX_OFFSET(%rsp), %rdx
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movq LR_R8_OFFSET(%rsp), %r8
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movq LR_R9_OFFSET(%rsp), %r9
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movaps (LR_XMM_OFFSET)(%rsp), %xmm0
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movaps (LR_XMM_OFFSET + XMM_SIZE)(%rsp), %xmm1
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movaps (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp), %xmm2
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movaps (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp), %xmm3
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movaps (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp), %xmm4
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movaps (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp), %xmm5
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movaps (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp), %xmm6
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movaps (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp), %xmm7
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#ifdef RESTORE_AVX
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/* Check if any xmm0-xmm7 registers are changed by audit
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module. */
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vpcmpeqq (LR_SIZE)(%rsp), %xmm0, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm0, (LR_VECTOR_OFFSET)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET)(%rsp), %ymm0
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vmovdqa %xmm0, (LR_XMM_OFFSET)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm1, (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp), %ymm1
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vmovdqa %xmm1, (LR_XMM_OFFSET + XMM_SIZE)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*2)(%rsp), %xmm2, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm2, (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp), %ymm2
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vmovdqa %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*3)(%rsp), %xmm3, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm3, (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp), %ymm3
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vmovdqa %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*4)(%rsp), %xmm4, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm4, (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp), %ymm4
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vmovdqa %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*5)(%rsp), %xmm5, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm5, (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp), %ymm5
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vmovdqa %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*6)(%rsp), %xmm6, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm6, (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp), %ymm6
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vmovdqa %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
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1: vpcmpeqq (LR_SIZE + XMM_SIZE*7)(%rsp), %xmm7, %xmm8
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vpmovmskb %xmm8, %esi
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cmpl $0xffff, %esi
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je 2f
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vmovdqa %xmm7, (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
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jmp 1f
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2: vmovdqu (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp), %ymm7
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vmovdqa %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
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1:
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#endif
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movq 16(%rbx), %r10 # Anything in framesize?
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testq %r10, %r10
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jns 3f
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/* There's nothing in the frame size, so there
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will be no call to the _dl_call_pltexit. */
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/* Get back registers content. */
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movq LR_RCX_OFFSET(%rsp), %rcx
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movq LR_RSI_OFFSET(%rsp), %rsi
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movq LR_RDI_OFFSET(%rsp), %rdi
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movq %rbx, %rsp
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movq (%rsp), %rbx
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cfi_restore(rbx)
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cfi_def_cfa_register(%rsp)
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addq $48, %rsp # Adjust the stack to the return value
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# (eats the reloc index and link_map)
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cfi_adjust_cfa_offset(-48)
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jmp *%r11 # Jump to function address.
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3:
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cfi_adjust_cfa_offset(48)
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cfi_rel_offset(%rbx, 0)
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cfi_def_cfa_register(%rbx)
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/* At this point we need to prepare new stack for the function
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which has to be called. We copy the original stack to a
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temporary buffer of the size specified by the 'framesize'
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returned from _dl_profile_fixup */
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leaq LR_RSP_OFFSET(%rbx), %rsi # stack
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addq $8, %r10
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andq $0xfffffffffffffff0, %r10
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movq %r10, %rcx
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subq %r10, %rsp
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movq %rsp, %rdi
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shrq $3, %rcx
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rep
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movsq
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movq 24(%rdi), %rcx # Get back register content.
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movq 32(%rdi), %rsi
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movq 40(%rdi), %rdi
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call *%r11
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mov 24(%rbx), %rsp # Drop the copied stack content
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/* Now we have to prepare the La_x86_64_retval structure for the
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_dl_call_pltexit. The La_x86_64_regs is being pointed by rsp now,
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so we just need to allocate the sizeof(La_x86_64_retval) space on
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the stack, since the alignment has already been taken care of. */
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#ifdef RESTORE_AVX
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/* sizeof(La_x86_64_retval). Need extra space for 2 SSE
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registers to detect if xmm0/xmm1 registers are changed
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by audit module. */
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subq $(LRV_SIZE + XMM_SIZE*2), %rsp
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#else
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subq $LRV_SIZE, %rsp # sizeof(La_x86_64_retval)
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#endif
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movq %rsp, %rcx # La_x86_64_retval argument to %rcx.
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/* Fill in the La_x86_64_retval structure. */
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movq %rax, LRV_RAX_OFFSET(%rcx)
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movq %rdx, LRV_RDX_OFFSET(%rcx)
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movaps %xmm0, LRV_XMM0_OFFSET(%rcx)
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movaps %xmm1, LRV_XMM1_OFFSET(%rcx)
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#ifdef RESTORE_AVX
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/* This is to support AVX audit modules. */
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vmovdqu %ymm0, LRV_VECTOR0_OFFSET(%rcx)
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vmovdqu %ymm1, LRV_VECTOR1_OFFSET(%rcx)
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/* Save xmm0/xmm1 registers to detect if they are changed
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by audit module. */
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vmovdqa %xmm0, (LRV_SIZE)(%rcx)
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vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE)(%rcx)
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#endif
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fstpt LRV_ST0_OFFSET(%rcx)
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fstpt LRV_ST1_OFFSET(%rcx)
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movq 24(%rbx), %rdx # La_x86_64_regs argument to %rdx.
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movq 40(%rbx), %rsi # Copy args pushed by PLT in register.
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movq 32(%rbx), %rdi # %rdi: link_map, %rsi: reloc_index
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call _dl_call_pltexit
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/* Restore return registers. */
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movq LRV_RAX_OFFSET(%rsp), %rax
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movq LRV_RDX_OFFSET(%rsp), %rdx
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movaps LRV_XMM0_OFFSET(%rsp), %xmm0
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movaps LRV_XMM1_OFFSET(%rsp), %xmm1
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#ifdef RESTORE_AVX
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/* Check if xmm0/xmm1 registers are changed by audit module. */
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vpcmpeqq (LRV_SIZE)(%rsp), %xmm0, %xmm2
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vpmovmskb %xmm2, %esi
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cmpl $0xffff, %esi
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jne 1f
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vmovdqu LRV_VECTOR0_OFFSET(%rsp), %ymm0
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1: vpcmpeqq (LRV_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm2
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vpmovmskb %xmm2, %esi
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cmpl $0xffff, %esi
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jne 1f
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vmovdqu LRV_VECTOR1_OFFSET(%rsp), %ymm1
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1:
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#endif
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fldt LRV_ST1_OFFSET(%rsp)
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fldt LRV_ST0_OFFSET(%rsp)
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movq %rbx, %rsp
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movq (%rsp), %rbx
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cfi_restore(rbx)
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cfi_def_cfa_register(%rsp)
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addq $48, %rsp # Adjust the stack to the return value
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# (eats the reloc index and link_map)
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cfi_adjust_cfa_offset(-48)
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retq
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#ifdef MORE_CODE
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cfi_adjust_cfa_offset(48)
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cfi_rel_offset(%rbx, 0)
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cfi_def_cfa_register(%rbx)
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# undef MORE_CODE
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#endif
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