glibc/sysdeps/aarch64/multiarch
Andrew Pinski 2f1f7a5f8a
Aarch64: Add new memset for Qualcomm's oryon-1 core
Qualcom's new core, oryon-1, has a different characteristics for
memset than the current versions of memset. For non-zero, larger
sizes, using GPRs rather than the SIMD stores is ~30% faster.
For even larger sizes, using the nontemporal stores is needed
not to polute the L1/L2 caches.

For zero values, using `dc zva` should be used. Since we
know the size will always be 64 bytes, we don't need to figure
out the size there.

I started with the emag memset and added back the `dc zva` code.

Changes since v1:
* v3: Fix comment formating

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2024-06-30 13:47:17 +02:00
..
dl-symbol-redir-ifunc.h
ifunc-impl-list.c Aarch64: Add new memset for Qualcomm's oryon-1 core 2024-06-30 13:47:17 +02:00
init-arch.h
Makefile Aarch64: Add new memset for Qualcomm's oryon-1 core 2024-06-30 13:47:17 +02:00
memchr_generic.S aarch64: Remove duplicate memchr/strlen in libc.a (BZ 31777) 2024-05-23 09:36:08 -03:00
memchr_nosimd.S
memchr.c
memcpy_a64fx.S
memcpy_generic.S
memcpy_mops.S
memcpy_oryon1.S Aarch64: Add memcpy for qualcomm's oryon-1 core 2024-06-30 13:46:33 +02:00
memcpy_sve.S
memcpy_thunderx2.S
memcpy_thunderx.S
memcpy.c Aarch64: Add memcpy for qualcomm's oryon-1 core 2024-06-30 13:46:33 +02:00
memmove_mops.S
memmove.c
memset_a64fx.S
memset_emag.S
memset_generic.S
memset_kunpeng.S
memset_mops.S
memset_oryon1.S Aarch64: Add new memset for Qualcomm's oryon-1 core 2024-06-30 13:47:17 +02:00
memset_zva64.S
memset.c Aarch64: Add new memset for Qualcomm's oryon-1 core 2024-06-30 13:47:17 +02:00
strlen_asimd.S
strlen_generic.S aarch64: Remove duplicate memchr/strlen in libc.a (BZ 31777) 2024-05-23 09:36:08 -03:00
strlen.c