Xi Ruoyao 97aa7b7346 LoongArch: Ensure sp 16-byte aligned for tlsdesc ... "ADDI sp, sp, 24" and "ADDI sp, sp, SZFCSREG" (SZFCSREG = 4) are misaligning the stack: the ABI mandates a 16-byte alignment. Fix it by changing the first one to "ADDI sp, sp, 32", and reuse the spare 4th slot for saving fcsr. Reported-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Xi Ruoyao <xry111@xry111.site>		2024-06-14 10:14:54 +08:00
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asm.h	LoongArch: Ensure sp 16-byte aligned for tlsdesc	2024-06-14 10:14:54 +08:00
ifunc.h
regdef.h