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8cb079d41b
* sysdeps/sparc/sparc64/add_n.S: Avoid using %g2, %g3, %g7 registers as much as possible. Declare them using .register pseudo-op if they are still used. * sysdeps/sparc/sparc64/lshift.S: Likewise. * sysdeps/sparc/sparc64/memchr.S: Likewise. * sysdeps/sparc/sparc64/memcmp.S: Likewise. * sysdeps/sparc/sparc64/memcpy.S: Likewise. * sysdeps/sparc/sparc64/memset.S: Likewise. * sysdeps/sparc/sparc64/rawmemchr.S: Likewise. * sysdeps/sparc/sparc64/rshift.S: Likewise. * sysdeps/sparc/sparc64/stpcpy.S: Likewise. * sysdeps/sparc/sparc64/stpncpy.S: Likewise. * sysdeps/sparc/sparc64/strcat.S: Likewise. * sysdeps/sparc/sparc64/strchr.S: Likewise. * sysdeps/sparc/sparc64/strcmp.S: Likewise. * sysdeps/sparc/sparc64/strcpy.S: Likewise. * sysdeps/sparc/sparc64/strcspn.S: Likewise. * sysdeps/sparc/sparc64/strlen.S: Likewise. * sysdeps/sparc/sparc64/strncmp.S: Likewise. * sysdeps/sparc/sparc64/strncpy.S: Likewise. * sysdeps/sparc/sparc64/strpbrk.S: Likewise. * sysdeps/sparc/sparc64/strspn.S: Likewise. * sysdeps/sparc/sparc64/sub_n.S: Likewise. * sysdeps/sparc/sparc64/dl-machine.h: Likewise. Optimize trampoline code for .plt4-.plt32767. Fix trampolines for .plt32768+. 1999-07-25 Jakub Jelinek <jj@ultra.linux.cz>
245 lines
7.8 KiB
ArmAsm
245 lines
7.8 KiB
ArmAsm
/* Copy SRC to DEST returning DEST.
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For SPARC v9.
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Copyright (C) 1998, 1999 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Jan Vondrak <jvon4518@ss1000.ms.mff.cuni.cz> and
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Jakub Jelinek <jj@ultra.linux.cz>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If not,
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write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include <sysdep.h>
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#include <asm/asi.h>
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#ifndef XCC
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.register %g2, #scratch
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.register %g3, #scratch
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.register %g7, #scratch
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#endif
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/* Normally, this uses
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((xword - 0x0101010101010101) & 0x8080808080808080) test
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to find out if any byte in xword could be zero. This is fast, but
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also gives false alarm for any byte in range 0x81-0xff. It does
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not matter for correctness, as if this test tells us there could
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be some zero byte, we check it byte by byte, but if bytes with
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high bits set are common in the strings, then this will give poor
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performance. You can #define EIGHTBIT_NOT_RARE and the algorithm
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will use one tick slower, but more precise test
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((xword - 0x0101010101010101) & (~xword) & 0x8080808080808080),
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which does not give any false alarms (but if some bits are set,
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one cannot assume from it which bytes are zero and which are not).
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It is yet to be measured, what is the correct default for glibc
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in these days for an average user.
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*/
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.text
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.align 32
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ENTRY(strcpy)
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sethi %hi(0x01010101), %g1 /* IEU0 Group */
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mov %o0, %g7 /* IEU1 */
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or %g1, %lo(0x01010101), %g1 /* IEU0 Group */
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andcc %o0, 7, %g0 /* IEU1 */
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sllx %g1, 32, %g2 /* IEU0 Group */
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bne,pn %icc, 12f /* CTI */
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andcc %o1, 7, %g3 /* IEU1 */
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or %g1, %g2, %g1 /* IEU0 Group */
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bne,pn %icc, 14f /* CTI */
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sllx %g1, 7, %g2 /* IEU0 Group */
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1: ldx [%o1], %o3 /* Load */
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add %o1, 8, %o1 /* IEU1 */
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2: mov %o3, %g3 /* IEU0 Group */
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3: sub %o3, %g1, %o2 /* IEU1 */
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ldxa [%o1] ASI_PNF, %o3 /* Load */
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#ifdef EIGHTBIT_NOT_RARE
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andn %o2, %g3, %o2 /* IEU0 Group */
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#endif
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add %o0, 8, %o0 /* IEU0 Group */
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andcc %o2, %g2, %g0 /* IEU1 */
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add %o1, 8, %o1 /* IEU0 Group */
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be,a,pt %xcc, 2b /* CTI */
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stx %g3, [%o0 - 8] /* Store */
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srlx %g3, 56, %g5 /* IEU0 Group */
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andcc %g5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 11f /* CTI */
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srlx %g3, 48, %g4 /* IEU0 */
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andcc %g4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 10f /* CTI */
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srlx %g3, 40, %g5 /* IEU0 */
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andcc %g5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 9f /* CTI */
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srlx %g3, 32, %g4 /* IEU0 */
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andcc %g4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 8f /* CTI */
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srlx %g3, 24, %g5 /* IEU0 */
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andcc %g5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 7f /* CTI */
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srlx %g3, 16, %g4 /* IEU0 */
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andcc %g4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 6f /* CTI */
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srlx %g3, 8, %g5 /* IEU0 */
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andcc %g5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 5f /* CTI */
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sub %o3, %g1, %o2 /* IEU0 */
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stx %g3, [%o0 - 8] /* Store Group */
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andcc %g3, 0xff, %g0 /* IEU1 */
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bne,pt %icc, 3b /* CTI */
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mov %o3, %g3 /* IEU0 Group */
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4: retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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.align 16
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5: stb %g5, [%o0 - 2] /* Store Group */
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srlx %g3, 16, %g4 /* IEU0 */
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6: sth %g4, [%o0 - 4] /* Store Group */
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srlx %g3, 32, %g4 /* IEU0 */
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stw %g4, [%o0 - 8] /* Store Group */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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7: stb %g5, [%o0 - 4] /* Store Group */
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srlx %g3, 32, %g4 /* IEU0 */
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8: stw %g4, [%o0 - 8] /* Store Group */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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9: stb %g5, [%o0 - 6] /* Store Group */
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srlx %g3, 48, %g4 /* IEU0 */
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10: sth %g4, [%o0 - 8] /* Store Group */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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11: stb %g5, [%o0 - 8] /* Store Group */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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12: or %g1, %g2, %g1 /* IEU0 Group */
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ldub [%o1], %o3 /* Load */
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sllx %g1, 7, %g2 /* IEU0 Group */
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stb %o3, [%o0] /* Store Group */
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13: add %o0, 1, %o0 /* IEU0 */
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add %o1, 1, %o1 /* IEU1 */
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andcc %o3, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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lduba [%o1] ASI_PNF, %o3 /* Load */
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andcc %o0, 7, %g0 /* IEU1 Group */
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bne,a,pt %icc, 13b /* CTI */
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stb %o3, [%o0] /* Store */
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andcc %o1, 7, %g3 /* IEU1 Group */
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be,a,pt %icc, 1b /* CTI */
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ldx [%o1], %o3 /* Load */
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14: orcc %g0, 64, %g4 /* IEU1 Group */
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sllx %g3, 3, %g5 /* IEU0 */
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sub %o1, %g3, %o1 /* IEU0 Group */
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sub %g4, %g5, %g4 /* IEU1 */
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/* %g1 = 0101010101010101 *
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* %g2 = 8080808080808080 *
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* %g3 = source alignment *
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* %g5 = number of bits to shift left *
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* %g4 = number of bits to shift right */
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ldxa [%o1] ASI_PNF, %o5 /* Load Group */
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addcc %o1, 8, %o1 /* IEU1 */
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15: sllx %o5, %g5, %o3 /* IEU0 Group */
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ldxa [%o1] ASI_PNF, %o5 /* Load */
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srlx %o5, %g4, %o4 /* IEU0 Group */
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add %o0, 8, %o0 /* IEU1 */
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or %o3, %o4, %o3 /* IEU0 Group */
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add %o1, 8, %o1 /* IEU1 */
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sub %o3, %g1, %o4 /* IEU0 Group */
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#ifdef EIGHTBIT_NOT_RARE
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andn %o4, %o3, %o4 /* IEU0 Group */
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#endif
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andcc %o4, %g2, %g0 /* IEU1 Group */
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be,a,pt %xcc, 15b /* CTI */
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stx %o3, [%o0 - 8] /* Store */
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srlx %o3, 56, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 22f /* CTI */
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srlx %o3, 48, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 21f /* CTI */
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srlx %o3, 40, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 20f /* CTI */
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srlx %o3, 32, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 19f /* CTI */
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srlx %o3, 24, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 18f /* CTI */
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srlx %o3, 16, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 17f /* CTI */
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srlx %o3, 8, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 16f /* CTI */
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andcc %o3, 0xff, %g0 /* IEU1 Group */
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bne,pn %icc, 15b /* CTI */
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stx %o3, [%o0 - 8] /* Store */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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.align 16
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16: srlx %o3, 8, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 2] /* Store */
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17: srlx %o3, 16, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 3] /* Store */
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18: srlx %o3, 24, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 4] /* Store */
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19: srlx %o3, 32, %o4 /* IEU0 Group */
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stw %o4, [%o0 - 8] /* Store */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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nop
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nop
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20: srlx %o3, 40, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 6] /* Store */
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21: srlx %o3, 48, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 7] /* Store */
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22: srlx %o3, 56, %o4 /* IEU0 Group */
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stb %o4, [%o0 - 8] /* Store */
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retl /* CTI+IEU1 Group */
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mov %g7, %o0 /* IEU0 */
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END(strcpy)
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