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578d080544
On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite fails to build for pre-R2 CPU. It assumes that it is possible to use the -mfp64 option to build tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU: error: '-mgp32' and '-mfp64' can only be combined if the target supports the mfhc1 and mthc1 instructions The same way it assumes that it is possible to use the -modd-spreg option to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at least a R1 CPU: warning: the 'mips2' architecture does not support odd single-precision registers This patches changes that by checking the usability of -mfp64 and -modd-spreg options in configure, and disable those tests when they can not be used. |
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.. | ||
bits | ||
fpu | ||
ieee754 | ||
include/sys | ||
mips32 | ||
mips64 | ||
nptl | ||
sys | ||
__longjmp.c | ||
abort-instr.h | ||
add_n.S | ||
addmul_1.S | ||
atomic-machine.h | ||
backtrace.c | ||
bsd-_setjmp.S | ||
bsd-setjmp.S | ||
configure | ||
configure.ac | ||
dl-dtprocnum.h | ||
dl-machine-reject-phdr.h | ||
dl-machine.h | ||
dl-procinfo.c | ||
dl-procinfo.h | ||
dl-tls.h | ||
dl-trampoline.c | ||
fpregdef.h | ||
fpu_control.h | ||
gccframe.h | ||
Implies | ||
jmpbuf-unwind.h | ||
ldsodefs.h | ||
libc-tls.c | ||
linkmap.h | ||
lshift.S | ||
machine-gmon.h | ||
Makefile | ||
math_private.h | ||
math-tests.h | ||
memcpy.S | ||
memset.S | ||
memusage.h | ||
mul_1.S | ||
preconfigure | ||
regdef.h | ||
rshift.S | ||
setjmp_aux.c | ||
setjmp.S | ||
sgidefs.h | ||
sotruss-lib.c | ||
stackinfo.h | ||
start.S | ||
strcmp.S | ||
sub_n.S | ||
submul_1.S | ||
tininess.h | ||
tls-macros.h | ||
tst-abi-fp32mod.c | ||
tst-abi-fp64amod.c | ||
tst-abi-fp64mod.c | ||
tst-abi-fpxxmod.c | ||
tst-abi-fpxxomod.c | ||
tst-abi-interlink.c | ||
tst-audit.h | ||
tst-mode-switch-1.c | ||
tst-mode-switch-2.c | ||
tst-mode-switch-3.c |