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2003-12-02 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/elf/initfini.c: Add unwind info. * sysdeps/ia64/dl-machine.h (elf_machine_matches_host): Mark with attribute "unused". (elf_machine_dynamic): Mark with attributes "unused" and "const". (elf_machine_runtime_setup): Likewise. * sysdeps/generic/dl-fptr.c (make_fptr_table): Mark with attribute "always_inline". * sysdeps/ia64/dl-machine.h (__ia64_init_bootstrap_fdesc_table): Likewise. * configure.in: Check whether compiler has libunwind support. * config.make.in (have-cc-with-libunwind): New variable. * config.h.in (HAVE_CC_WITH_LIBUNWIND): New macro. * Makeconfig (gnulib): If have-cc-withh-libunwind is "yes", also mention -lunwind. 003-11-12 David Mosberger <davidm@hpl.hp.com> * sysdeps/unix/sysv/linux/ia64/sysdep.h: Define DO_CALL_VIA_BREAK. Redefine DO_CALL to use vdso if supported, otherwise DO_CALL_VIA_BREAK. Likewise for DO_INLINE_SYSCALL. Make INTERNAL_SYSCALL use DO_INLINE_SYSCALL. * sysdeps/unix/sysv/linux/ia64/vfork.S: Use DO_CALL_VIA_BREAK() instead of DO_CALL(). * sysdeps/unix/sysv/linux/ia64/clone2.S: Use break directly instead of DO_CALL(). * sysdeps/unix/sysv/linux/ia64/brk.S (__curbrk): Restructure it to take advantage of DO_CALL() macro. * sysdeps/unix/sysv/linux/ia64/setcontext.S: Likewise. * sysdeps/unix/sysv/linux/ia64/getcontext.S: Likewise. * elf/rtld.c (dl_main): Restrict dl_sysinfo_dso check to first program header. On ia64, the check failed previously because there are two program headers. * sysdeps/generic/s_nexttowardf.c: Likewise. * math/bug-nexttoward.c: New file.
159 lines
3.9 KiB
ArmAsm
159 lines
3.9 KiB
ArmAsm
/* Copyright (C) 2001, 2002 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David Mosberger-Tang <davidm@hpl.hp.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <sysdep.h>
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#include <features.h>
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#include "ucontext_i.h"
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/* __getcontext (ucontext_t *ucp)
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Saves the machine context in UCP such that when it is activated,
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it appears as if __getcontext() returned again. The only difference
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is that on a first return, r9 contains 1 and on a subsequent
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return, it contains 0.
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This implementation in intended to be used for *synchronous* context
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switches only. Therefore, it does not have to save anything
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other than the PRESERVED state. */
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ENTRY(__getcontext)
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.prologue
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.body
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alloc r11 = ar.pfs, 1, 0, 4, 0
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// sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask):
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mov r3 = SC_MASK
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mov out0 = SIG_BLOCK
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flushrs // save dirty partition on rbs
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mov out1 = 0
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add out2 = r3, in0
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mov out3 = 8 // sizeof kernel sigset_t
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DO_CALL(__NR_rt_sigprocmask)
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mov.m rFPSR = ar.fpsr
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mov.m rRSC = ar.rsc
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add r2 = SC_GR+1*8, r32
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;;
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mov.m rBSP = ar.bsp
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.prologue
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.save ar.unat, rUNAT
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mov.m rUNAT = ar.unat
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.body
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add r3 = SC_GR+4*8, r32
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;;
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.mem.offset 0,0; st8.spill [r2] = r1, (5*8 - 1*8)
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.mem.offset 8,0; st8.spill [r3] = r4, 16
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mov rPFS = r11
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;;
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.mem.offset 0,0; st8.spill [r2] = r5, 16
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.mem.offset 8,0; st8.spill [r3] = r6, 48
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and rTMP = ~0x3, rRSC
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;;
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.mem.offset 0,0; st8.spill [r2] = r7, (SC_FR+2*16-(SC_GR+7*8))
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.mem.offset 8,0; st8.spill [r3] = sp, (SC_FR+3*16-(SC_GR+12*8))
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;;
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mov.m ar.rsc = rTMP // put RSE into enforced lazy mode
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mov.m rNAT = ar.unat
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mov.i rLC = ar.lc
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;;
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mov.m rRNAT = ar.rnat
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mov.m ar.rsc = rRSC // restore RSE mode
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mov rPR = pr
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/*
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* Rotate NaT bits by rPOS positions to the right:
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*/
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stf.spill [r2] = f2, 32
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stf.spill [r3] = f3, 32
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add rPOS = SC_GR, r32 // rPOS <- &sc_gr[0]
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;;
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stf.spill [r2] = f4, (16*16-4*16)
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stf.spill [r3] = f5, (17*16-5*16)
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extr.u rPOS = rPOS, 3, 6 // get NaT bit number for r0
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;;
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stf.spill [r2] = f16, 32
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stf.spill [r3] = f17, 32
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sub rCPOS = 64, rPOS
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;;
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stf.spill [r2] = f18, 32
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stf.spill [r3] = f19, 32
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shr.u rTMP = rNAT, rPOS
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;;
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stf.spill [r2] = f20, 32
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stf.spill [r3] = f21, 32
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shl rNAT = rNAT, rCPOS
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;;
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stf.spill [r2] = f22, 32
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stf.spill [r3] = f23, 32
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or rNAT = rNAT, rTMP
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;;
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stf.spill [r2] = f24, 32
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stf.spill [r3] = f25, 32
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mov r8 = 0
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;;
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stf.spill [r2] = f26, 32
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stf.spill [r3] = f27, 32
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mov r9 = 1
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;;
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stf.spill [r2] = f28, 32
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stf.spill [r3] = f29, 32
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mov rB0 = b0
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;;
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stf.spill [r2] = f30, 32
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stf.spill [r3] = f31, 32
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mov rB1 = b1
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;;
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mov ar.unat = rUNAT // we're done spilling integer regs; restore caller's UNaT
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add r2 = SC_NAT, r32
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add r3 = SC_BSP, r32
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;;
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st8 [r2] = rNAT, (SC_RNAT-SC_NAT)
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st8 [r3] = rBSP, (SC_UNAT-SC_BSP)
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mov rB2 = b2
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;;
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st8 [r2] = rRNAT, (SC_FPSR-SC_RNAT)
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st8 [r3] = rUNAT, (SC_PFS-SC_UNAT)
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mov rB3 = b3
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;;
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st8 [r2] = rFPSR, (SC_LC-SC_FPSR)
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st8 [r3] = rPFS, (SC_PR-SC_PFS)
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mov rB4 = b4
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;;
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st8 [r2] = rLC, (SC_BR+0*8-SC_LC)
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st8 [r3] = rPR, (SC_BR+1*8-SC_PR)
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mov rB5 = b5
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;;
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st8 [r2] = rB0, 16
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st8 [r3] = rB1, 16
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;;
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st8 [r2] = rB2, 16
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st8 [r3] = rB3, 16
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;;
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st8 [r2] = rB4
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st8 [r3] = rB5
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ret
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END(__getcontext)
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weak_alias(__getcontext, getcontext)
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