glibc/sysdeps
H.J. Lu ecce11aa07 x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717]
GCC 11 supports -march=x86-64-v[234] to enable x86 micro-architecture ISA
levels:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97250

and -mneeded to emit GNU_PROPERTY_X86_ISA_1_NEEDED property with
GNU_PROPERTY_X86_ISA_1_V[234] marker:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13

Binutils support for GNU_PROPERTY_X86_ISA_1_V[234] marker were added by

commit b0ab06937385e0ae25cebf1991787d64f439bf12
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Oct 30 06:49:57 2020 -0700

    x86: Support GNU_PROPERTY_X86_ISA_1_BASELINE marker

and

commit 32930e4edbc06bc6f10c435dbcc63131715df678
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Oct 9 05:05:57 2020 -0700

    x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker

GNU_PROPERTY_X86_ISA_1_NEEDED property in x86 ELF binaries indicate the
micro-architecture ISA level required to execute the binary.  The marker
must be added by programmers explicitly in one of 3 ways:

1. Pass -mneeded to GCC.
2. Add the marker in the linker inputs as this patch does.
3. Pass -z x86-64-v[234] to the linker.

Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker support to ld.so if binutils 2.32 or newer is used to build glibc:

1. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
markers to elf.h.
2. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker to abi-note.o based on the ISA level used to compile abi-note.o,
assuming that the same ISA level is used to compile the whole glibc.
3. Add isa_1 to cpu_features to record the supported x86 ISA level.
4. Rename _dl_process_cet_property_note to _dl_process_property_note and
add GNU_PROPERTY_X86_ISA_1_V[234] marker detection.
5. Update _rtld_main_check and _dl_open_check to check loaded objects
with the incompatible ISA level.
6. Add a testcase to verify that dlopen an x86-64-v4 shared object fails
on lesser platforms.
7. Use <get-isa-level.h> in dl-hwcaps-subdirs.c and tst-glibc-hwcaps.c.

Tested under i686, x32 and x86-64 modes on x86-64-v2, x86-64-v3 and
x86-64-v4 machines.

Marked elf/tst-isa-level-1 with x86-64-v4, ran it on x86-64-v3 machine
and got:

[hjl@gnu-cfl-2 build-x86_64-linux]$ ./elf/tst-isa-level-1
./elf/tst-isa-level-1: CPU ISA level is lower than required
[hjl@gnu-cfl-2 build-x86_64-linux]$
2021-01-07 13:10:13 -08:00
..
aarch64 Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
alpha Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
arc
arm
csky
generic Move generic nan-pseudo-number.h to ldbl-96 2021-01-04 14:51:52 +05:30
gnu
hppa
htl
hurd
i386 x86: Check IFUNC definition in unrelocated executable [BZ #20019] 2021-01-04 12:01:01 -08:00
ia64
ieee754 Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
m68k
mach hurd: Fix mmap(!MAP_FIXED) on bogus address 2021-01-04 20:22:59 +01:00
microblaze
mips Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
nios2
nptl
posix
powerpc
pthread
riscv
s390 Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
sh
sparc Remove dbl-64/wordsize-64 (part 2) 2021-01-07 15:26:26 +00:00
unix Add SEGV_MTEAERR and SEGV_MTESERR from Linux 5.10. 2021-01-06 18:23:00 +00:00
wordsize-32
wordsize-64
x86 x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717] 2021-01-07 13:10:13 -08:00
x86_64 x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717] 2021-01-07 13:10:13 -08:00