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x86: Automate generation of PREFERRED_FEATURE_INDEX_1 bitfield

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Use a .def file to define the bitfield layout, so that it is possible
to iterate over field members using the preprocessor.
This commit is contained in:
Florian Weimer 2021-03-02 14:58:05 +01:00
parent 851f32cf7b
commit e4933c8a92
2 changed files with 51 additions and 34 deletions
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34
sysdeps/x86/include/cpu-features-preferred_feature_index_1.def Normal file
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@ -0,0 +1,34 @@
/* Bits in the PREFERRED_FEATURE_INDEX_1 bitfield of <cpu-features.h>.
Copyright (C) 2020-2021 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
BIT (Fast_Rep_String)
BIT (Fast_Copy_Backward)
BIT (Slow_BSF)
BIT (Fast_Unaligned_Load)
BIT (Prefer_PMINUB_for_stringop)
BIT (Fast_Unaligned_Copy)
BIT (I586)
BIT (I686)
BIT (Slow_SSE4_2)
BIT (AVX_Fast_Unaligned_Load)
BIT (Prefer_MAP_32BIT_EXEC)
BIT (Prefer_No_VZEROUPPER)
BIT (Prefer_ERMS)
BIT (Prefer_No_AVX512)
BIT (MathVec_Prefer_No_AVX512)
BIT (Prefer_FSRM)

51
sysdeps/x86/include/cpu-features.h
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@ -772,40 +772,23 @@ enum
/* EBX. */
#define reg_PTWRITE ebx
/* PREFERRED_FEATURE_INDEX_1. */
#define bit_arch_I586 (1u << 0)
#define bit_arch_I686 (1u << 1)
#define bit_arch_Fast_Rep_String (1u << 2)
#define bit_arch_Fast_Copy_Backward (1u << 3)
#define bit_arch_Fast_Unaligned_Load (1u << 4)
#define bit_arch_Fast_Unaligned_Copy (1u << 5)
#define bit_arch_Slow_BSF (1u << 6)
#define bit_arch_Slow_SSE4_2 (1u << 7)
#define bit_arch_AVX_Fast_Unaligned_Load (1u << 8)
#define bit_arch_Prefer_MAP_32BIT_EXEC (1u << 9)
#define bit_arch_Prefer_PMINUB_for_stringop (1u << 10)
#define bit_arch_Prefer_No_VZEROUPPER (1u << 11)
#define bit_arch_Prefer_ERMS (1u << 12)
#define bit_arch_Prefer_FSRM (1u << 13)
#define bit_arch_Prefer_No_AVX512 (1u << 14)
#define bit_arch_MathVec_Prefer_No_AVX512 (1u << 15)
#define index_arch_Fast_Rep_String PREFERRED_FEATURE_INDEX_1
#define index_arch_Fast_Copy_Backward PREFERRED_FEATURE_INDEX_1
#define index_arch_Slow_BSF PREFERRED_FEATURE_INDEX_1
#define index_arch_Fast_Unaligned_Load PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_PMINUB_for_stringop PREFERRED_FEATURE_INDEX_1
#define index_arch_Fast_Unaligned_Copy PREFERRED_FEATURE_INDEX_1
#define index_arch_I586 PREFERRED_FEATURE_INDEX_1
#define index_arch_I686 PREFERRED_FEATURE_INDEX_1
#define index_arch_Slow_SSE4_2 PREFERRED_FEATURE_INDEX_1
#define index_arch_AVX_Fast_Unaligned_Load PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_MAP_32BIT_EXEC PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_No_VZEROUPPER PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_ERMS PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_No_AVX512 PREFERRED_FEATURE_INDEX_1
#define index_arch_MathVec_Prefer_No_AVX512 PREFERRED_FEATURE_INDEX_1
#define index_arch_Prefer_FSRM PREFERRED_FEATURE_INDEX_1
/* PREFERRED_FEATURE_INDEX_1. First define the bitindex values
sequentially, then define the bit_arch* and index_arch_* lookup
constants. */
enum
{
#define BIT(x) _bitindex_arch_##x ,
#include "cpu-features-preferred_feature_index_1.def"
#undef BIT
};
enum
{
#define BIT(x) \
bit_arch_##x = 1u << _bitindex_arch_##x , \
index_arch_##x = PREFERRED_FEATURE_INDEX_1,
#include "cpu-features-preferred_feature_index_1.def"
#undef BIT
};
/* XCR0 Feature flags. */
#define bit_XMM_state (1u << 1)