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x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations
The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi'
and 'sarx' instructions, which belongs to the BMI2 CPU feature.
Fixes: acfd088a19
("x86: Optimize memchr-avx2.S")
Partially resolves: BZ #29611
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
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@ -69,10 +69,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (BMI2)),
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__memchr_evex_rtm)
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X86_IFUNC_IMPL_ADD_V3 (array, i, memchr,
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CPU_FEATURE_USABLE (AVX2),
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)),
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__memchr_avx2)
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X86_IFUNC_IMPL_ADD_V3 (array, i, memchr,
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)
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&& CPU_FEATURE_USABLE (RTM)),
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__memchr_avx2_rtm)
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/* ISA V2 wrapper for SSE2 implementation because the SSE2
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@ -335,10 +337,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (BMI2)),
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__rawmemchr_evex_rtm)
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X86_IFUNC_IMPL_ADD_V3 (array, i, rawmemchr,
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CPU_FEATURE_USABLE (AVX2),
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)),
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__rawmemchr_avx2)
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X86_IFUNC_IMPL_ADD_V3 (array, i, rawmemchr,
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)
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&& CPU_FEATURE_USABLE (RTM)),
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__rawmemchr_avx2_rtm)
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/* ISA V2 wrapper for SSE2 implementation because the SSE2
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@ -927,10 +931,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (BMI2)),
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__wmemchr_evex_rtm)
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X86_IFUNC_IMPL_ADD_V3 (array, i, wmemchr,
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CPU_FEATURE_USABLE (AVX2),
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)),
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__wmemchr_avx2)
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X86_IFUNC_IMPL_ADD_V3 (array, i, wmemchr,
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (BMI2)
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&& CPU_FEATURE_USABLE (RTM)),
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__wmemchr_avx2_rtm)
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/* ISA V2 wrapper for SSE2 implementation because the SSE2
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