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Roland McGrath
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sysdeps/standalone/i960/i960ca.h
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207
sysdeps/standalone/i960/i960ca.h
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/* Copyright (C) 1994 Free Software Foundation, Inc.
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Contributed by Joel Sherrill (jsherril@redstone-emh2.army.mil),
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On-Line Applications Research Corporation.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc., 675 Mass Ave,
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Cambridge, MA 02139, USA. */
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/* i960ca.h
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*
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* This file contains macros which are used to access i80960CA
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* registers which are not addressable by C. The functions
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* in this file sould be useful to the developer of target
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* specific code.
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*/
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#ifndef i960ca_h__
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#define i960ca_h__
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typedef unsigned char unsigned8;
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typedef unsigned short unsigned16;
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typedef unsigned int unsigned32;
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/*
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* Intel i80960CA Processor Control Block
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*/
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struct i80960ca_prcb {
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unsigned32 *fault_tbl; /* fault table base address */
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struct i80960ca_ctltbl
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*control_tbl; /* control table base address */
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unsigned32 initial_ac; /* AC register initial value */
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unsigned32 fault_config; /* fault configuration word */
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void *intr_tbl; /* interrupt table base address */
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void *sys_proc_tbl; /* system procedure table */
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/* base address */
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unsigned32 reserved; /* reserved */
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unsigned32 *intr_stack; /* interrupt stack pointer */
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unsigned32 ins_cache_cfg; /* instruction cache */
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/* configuration word */
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unsigned32 reg_cache_cfg; /* register cache */
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/* configuration word */
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};
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/*
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* Intel i80960CA Control Table
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*/
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struct i80960ca_ctltbl {
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/* Control Group 0 */
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unsigned32 ipb0; /* IP breakpoint 0 */
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unsigned32 ipb1; /* IP breakpoint 1 */
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unsigned32 dab0; /* data address breakpoint 0 */
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unsigned32 dab1; /* data address breakpoint 1 */
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/* Control Group 1 */
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unsigned32 imap0; /* interrupt map 0 */
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unsigned32 imap1; /* interrupt map 1 */
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unsigned32 imap2; /* interrupt map 2 */
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unsigned32 icon; /* interrupt control */
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/* Control Group 2 */
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unsigned32 mcon0; /* memory region 0 configuration */
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unsigned32 mcon1; /* memory region 1 configuration */
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unsigned32 mcon2; /* memory region 2 configuration */
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unsigned32 mcon3; /* memory region 3 configuration */
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/* Control Group 3 */
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unsigned32 mcon4; /* memory region 4 configuration */
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unsigned32 mcon5; /* memory region 5 configuration */
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unsigned32 mcon6; /* memory region 6 configuration */
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unsigned32 mcon7; /* memory region 7 configuration */
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/* Control Group 4 */
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unsigned32 mcon8; /* memory region 8 configuration */
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unsigned32 mcon9; /* memory region 9 configuration */
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unsigned32 mcon10; /* memory region 10 configuration */
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unsigned32 mcon11; /* memory region 11 configuration */
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/* Control Group 5 */
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unsigned32 mcon12; /* memory region 12 configuration */
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unsigned32 mcon13; /* memory region 13 configuration */
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unsigned32 mcon14; /* memory region 14 configuration */
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unsigned32 mcon15; /* memory region 15 configuration */
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/* Control Group 6 */
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unsigned32 bpcon; /* breakpoint control */
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unsigned32 tc; /* trace control */
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unsigned32 bcon; /* bus configuration control */
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unsigned32 reserved; /* reserved */
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};
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#define disable_intr( oldlevel ) \
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{ (oldlevel) = 0x1f0000; \
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asm volatile ( "modpc 0,%1,%1" \
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: "=d" ((oldlevel)) \
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: "0" ((oldlevel)) ); \
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}
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#define enable_intr( oldlevel ) \
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{ unsigned32 _mask = 0x1f0000; \
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asm volatile ( "modpc 0,%0,%1" \
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: "=d" (_mask), "=d" ((oldlevel)) \
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: "0" (_mask), "1" ((oldlevel)) ); \
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}
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#define flash_intr( oldlevel ) \
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{ unsigned32 _mask = 0x1f0000; \
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asm volatile ( "modpc 0,%0,%1 ; \
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mov %0,%1 ; \
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modpc 0,%0,%1" \
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: "=d" (_mask), "=d" ((oldlevel)) \
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: "0" (_mask), "1" ((oldlevel)) ); \
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}
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#define atomic_modify( mask, addr, prev ) \
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{ register unsigned32 _mask = (mask); \
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register unsigned32 *_addr = (unsigned32 *)(addr); \
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asm volatile( "atmod %0,%1,%1" \
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: "=d" (_addr), "=d" (_mask) \
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: "0" (_addr), "1" (_mask) ); \
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(prev) = _mask; \
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}
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#define delay( microseconds ) \
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{ register unsigned32 _delay=(microseconds); \
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register unsigned32 _tmp; \
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asm volatile( "delay0: \
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remo 3,31,%0 ; \
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cmpo 0,%0 ; \
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subo 1,%1,%1 ; \
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cmpobne.t 0,%1,delay0 " \
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: "=d" (_tmp), "=d" (_delay) \
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: "0" (_tmp), "1" (_delay) ); \
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}
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#define enable_tracing() \
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{ register unsigned32 _pc = 0x1; \
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asm volatile( "modpc 0,%0,%0" : "=d" (_pc) : "0" (_pc) ); \
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}
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#define unmask_intr( xint ) \
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{ register unsigned32 _mask= (1<<(xint)); \
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asm volatile( "or sf1,%0,sf1" : "=d" (_mask) : "0" (_mask) ); \
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}
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#define mask_intr( xint ) \
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{ register unsigned32 _mask= (1<<(xint)); \
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asm volatile( "andnot %0,sf1,sf1" : "=d" (_mask) : "0" (_mask) ); \
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}
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#define clear_intr( xint ) \
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{ register unsigned32 _xint=(xint); \
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asm volatile( "loop_til_cleared:
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clrbit %0,sf0,sf0 ; \
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bbs %0,sf0,loop_til_cleared" \
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: "=d" (_xint) : "0" (_xint) ); \
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}
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#define reload_ctl_group( group ) \
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{ register int _cmd = ((group)|0x400) ; \
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asm volatile( "sysctl %0,%0,%0" : "=d" (_cmd) : "0" (_cmd) ); \
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}
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#define cause_intr( intr ) \
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{ register int _intr = (intr); \
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asm volatile( "sysctl %0,%0,%0" : "=d" (_intr) : "0" (_intr) ); \
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}
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#define soft_reset( prcb ) \
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{ register struct i80960ca_prcb *_prcb = (prcb); \
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register unsigned32 *_next=0; \
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register unsigned32 _cmd = 0x30000; \
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asm volatile( "lda next,%1; \
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sysctl %0,%1,%2; \
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next: mov g0,g0" \
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: "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
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: "0" (_cmd), "1" (_next), "2" (_prcb) ); \
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}
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static inline unsigned32 pend_intrs()
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{ register unsigned32 _intr=0;
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asm volatile( "mov sf0,%0" : "=d" (_intr) : "0" (_intr) );
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return ( _intr );
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}
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static inline unsigned32 mask_intrs()
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{ register unsigned32 _intr=0;
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asm volatile( "mov sf1,%0" : "=d" (_intr) : "0" (_intr) );
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return( _intr );
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}
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static inline unsigned32 get_fp()
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{ register unsigned32 _fp=0;
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asm volatile( "mov fp,%0" : "=d" (_fp) : "0" (_fp) );
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return ( _fp );
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}
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#endif
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/* end of include file */
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