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* sysdeps/mips/sys/regdef.h (t4,t5,t6,t7): Renamed to t0..t3 on NewABI. (ta0, ta1, ta2, ta3): Defined to t4..t7 on o32, and a4..a7 on NewABI. * sysdeps/mips/mips64/memcpy.S: Adjust register naming conventions. * sysdeps/mips/mips64/memset.S: Likewise. * sysdeps/unix/mips/sysdep.S (__syscall_error) [_LIBC_REENTRANT]: Use t0 instead of t4 as temporary.
2003-04-08 Alexandre Oliva <aoliva@redhat.com> * sysdeps/mips/sys/regdef.h (t4,t5,t6,t7): Renamed to t0..t3 on NewABI. (ta0, ta1, ta2, ta3): Defined to t4..t7 on o32, and a4..a7 on NewABI. * sysdeps/mips/mips64/memcpy.S: Adjust register naming conventions. * sysdeps/mips/mips64/memset.S: Likewise. * sysdeps/unix/mips/sysdep.S (__syscall_error) [_LIBC_REENTRANT]: Use t0 instead of t4 as temporary.
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Alexandre Oliva
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12
ChangeLog
12
ChangeLog
@ -1,3 +1,15 @@
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2003-04-08 Alexandre Oliva <aoliva@redhat.com>
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* sysdeps/mips/sys/regdef.h (t4,t5,t6,t7): Renamed to t0..t3 on
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NewABI.
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(ta0, ta1, ta2, ta3): Defined to t4..t7 on o32, and a4..a7 on
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NewABI.
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* sysdeps/mips/mips64/memcpy.S: Adjust register naming
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conventions.
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* sysdeps/mips/mips64/memset.S: Likewise.
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* sysdeps/unix/mips/sysdep.S (__syscall_error) [_LIBC_REENTRANT]:
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Use t0 instead of t4 as temporary.
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2003-04-07 Ulrich Drepper <drepper@redhat.com>
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* elf/ldconfig.c (parse_conf): Ignore leading whitespace. Use
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@ -42,71 +42,71 @@
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ENTRY (memcpy)
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.set noreorder
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slti a4, a2, 16 # Less than 16?
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bne a4, zero, L(last16)
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slti t0, a2, 16 # Less than 16?
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bne t0, zero, L(last16)
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move v0, a0 # Setup exit value before too late
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xor a4, a1, a0 # Find a0/a1 displacement
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andi a4, 0x7
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bne a4, zero, L(shift) # Go handle the unaligned case
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PTR_SUBU a5, zero, a1
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andi a5, 0x7 # a0/a1 are aligned, but are we
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beq a5, zero, L(chk8w) # starting in the middle of a word?
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PTR_SUBU a2, a5
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LDHI a4, 0(a1) # Yes we are... take care of that
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PTR_ADDU a1, a5
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SDHI a4, 0(a0)
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PTR_ADDU a0, a5
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xor t0, a1, a0 # Find a0/a1 displacement
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andi t0, 0x7
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bne t0, zero, L(shift) # Go handle the unaligned case
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PTR_SUBU t1, zero, a1
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andi t1, 0x7 # a0/a1 are aligned, but are we
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beq t1, zero, L(chk8w) # starting in the middle of a word?
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PTR_SUBU a2, t1
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LDHI t0, 0(a1) # Yes we are... take care of that
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PTR_ADDU a1, t1
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SDHI t0, 0(a0)
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PTR_ADDU a0, t1
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L(chk8w):
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andi a4, a2, 0x3f # 64 or more bytes left?
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beq a4, a2, L(chk1w)
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PTR_SUBU a3, a2, a4 # Yes
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andi t0, a2, 0x3f # 64 or more bytes left?
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beq t0, a2, L(chk1w)
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PTR_SUBU a3, a2, t0 # Yes
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PTR_ADDU a3, a1 # a3 = end address of loop
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move a2, a4 # a2 = what will be left after loop
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move a2, t0 # a2 = what will be left after loop
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L(lop8w):
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ld a4, 0(a1) # Loop taking 8 words at a time
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ld a5, 8(a1)
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ld a6, 16(a1)
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ld a7, 24(a1)
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ld t4, 32(a1)
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ld t5, 40(a1)
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ld t6, 48(a1)
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ld t7, 56(a1)
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ld t0, 0(a1) # Loop taking 8 words at a time
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ld t1, 8(a1)
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ld t2, 16(a1)
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ld t3, 24(a1)
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ld ta0, 32(a1)
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ld ta1, 40(a1)
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ld ta2, 48(a1)
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ld ta3, 56(a1)
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PTR_ADDIU a0, 64
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PTR_ADDIU a1, 64
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sd a4, -64(a0)
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sd a5, -56(a0)
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sd a6, -48(a0)
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sd a7, -40(a0)
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sd t4, -32(a0)
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sd t5, -24(a0)
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sd t6, -16(a0)
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sd t0, -64(a0)
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sd t1, -56(a0)
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sd t2, -48(a0)
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sd t3, -40(a0)
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sd ta0, -32(a0)
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sd ta1, -24(a0)
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sd ta2, -16(a0)
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bne a1, a3, L(lop8w)
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sd t7, -8(a0)
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sd ta3, -8(a0)
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L(chk1w):
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andi a4, a2, 0x7 # 8 or more bytes left?
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beq a4, a2, L(last16)
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PTR_SUBU a3, a2, a4 # Yes, handle them one dword at a time
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andi t0, a2, 0x7 # 8 or more bytes left?
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beq t0, a2, L(last16)
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PTR_SUBU a3, a2, t0 # Yes, handle them one dword at a time
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PTR_ADDU a3, a1 # a3 again end address
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move a2, a4
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move a2, t0
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L(lop1w):
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ld a4, 0(a1)
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ld t0, 0(a1)
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PTR_ADDIU a0, 8
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PTR_ADDIU a1, 8
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bne a1, a3, L(lop1w)
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sd a4, -8(a0)
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sd t0, -8(a0)
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L(last16):
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blez a2, L(lst16e) # Handle last 16 bytes, one at a time
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PTR_ADDU a3, a2, a1
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L(lst16l):
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lb a4, 0(a1)
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lb t0, 0(a1)
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PTR_ADDIU a0, 1
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PTR_ADDIU a1, 1
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bne a1, a3, L(lst16l)
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sb a4, -1(a0)
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sb t0, -1(a0)
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L(lst16e):
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jr ra # Bye, bye
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nop
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@ -116,24 +116,24 @@ L(shift):
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andi a3, 0x7 # (unoptimized case...)
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beq a3, zero, L(shft1)
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PTR_SUBU a2, a3 # a2 = bytes left
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LDHI a4, 0(a1) # Take care of first odd part
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LDLO a4, 7(a1)
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LDHI t0, 0(a1) # Take care of first odd part
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LDLO t0, 7(a1)
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PTR_ADDU a1, a3
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SDHI a4, 0(a0)
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SDHI t0, 0(a0)
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PTR_ADDU a0, a3
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L(shft1):
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andi a4, a2, 0x7
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PTR_SUBU a3, a2, a4
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andi t0, a2, 0x7
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PTR_SUBU a3, a2, t0
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PTR_ADDU a3, a1
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L(shfth):
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LDHI a5, 0(a1) # Limp through, dword by dword
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LDLO a5, 7(a1)
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LDHI t1, 0(a1) # Limp through, dword by dword
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LDLO t1, 7(a1)
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PTR_ADDIU a0, 8
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PTR_ADDIU a1, 8
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bne a1, a3, L(shfth)
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sd a5, -8(a0)
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sd t1, -8(a0)
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b L(last16) # Handle anything which may be left
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move a2, a4
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move a2, t0
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.set reorder
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END (memcpy)
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@ -36,33 +36,33 @@
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ENTRY (memset)
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.set noreorder
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slti t5, a2, 16 # Less than 16?
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bne t5, zero, L(last16)
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slti ta1, a2, 16 # Less than 16?
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bne ta1, zero, L(last16)
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move v0, a0 # Setup exit value before too late
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beq a1, zero, L(ueven) # If zero pattern, no need to extend
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andi a1, 0xff # Avoid problems with bogus arguments
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dsll t4, a1, 8
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or a1, t4
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dsll t4, a1, 16
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or a1, t4 # a1 is now pattern in full word
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dsll t4, a1, 32
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or a1, t4 # a1 is now pattern in double word
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dsll ta0, a1, 8
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or a1, ta0
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dsll ta0, a1, 16
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or a1, ta0 # a1 is now pattern in full word
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dsll ta0, a1, 32
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or a1, ta0 # a1 is now pattern in double word
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L(ueven):
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PTR_SUBU t4, zero, a0 # Unaligned address?
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andi t4, 0x7
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beq t4, zero, L(chkw)
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PTR_SUBU a2, t4
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PTR_SUBU ta0, zero, a0 # Unaligned address?
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andi ta0, 0x7
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beq ta0, zero, L(chkw)
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PTR_SUBU a2, ta0
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SDHI a1, 0(a0) # Yes, handle first unaligned part
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PTR_ADDU a0, t4 # Now both a0 and a2 are updated
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PTR_ADDU a0, ta0 # Now both a0 and a2 are updated
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L(chkw):
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andi t4, a2, 0xf # Enough left for one loop iteration?
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beq t4, a2, L(chkl)
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PTR_SUBU a3, a2, t4
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andi ta0, a2, 0xf # Enough left for one loop iteration?
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beq ta0, a2, L(chkl)
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PTR_SUBU a3, a2, ta0
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PTR_ADDU a3, a0 # a3 is last loop address +1
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move a2, t4 # a2 is now # of bytes left after loop
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move a2, ta0 # a2 is now # of bytes left after loop
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L(loopw):
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PTR_ADDIU a0, 16 # Handle 2 dwords pr. iteration
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sd a1, -16(a0)
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@ -70,9 +70,9 @@ L(loopw):
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sd a1, -8(a0)
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L(chkl):
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andi t4, a2, 0x8 # Check if there is at least a double
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beq t4, zero, L(last16) # word remaining after the loop
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PTR_SUBU a2, t4
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andi ta0, a2, 0x8 # Check if there is at least a double
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beq ta0, zero, L(last16) # word remaining after the loop
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PTR_SUBU a2, ta0
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sd a1, 0(a0) # Yes...
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PTR_ADDIU a0, 8
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@ -32,20 +32,32 @@
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#define a2 $6
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#define a3 $7
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#if _MIPS_SIM != _MIPS_SIM_ABI32
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#define a4 $8
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#define a5 $9
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#define a6 $10
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#define a7 $11
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#define a4 $8
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#define a5 $9
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#define a6 $10
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#define a7 $11
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#define t0 $12
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#define t1 $13
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#define t2 $14
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#define t3 $15
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#define ta0 a4
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#define ta1 a5
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#define ta2 a6
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#define ta3 a7
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#else /* if _MIPS_SIM == _MIPS_SIM_ABI32 */
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#define t0 $8 /* caller saved */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define ta0 t4
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#define ta1 t5
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#define ta2 t6
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#define ta3 t7
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#define s0 $16 /* callee saved */
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#define s1 $17
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#define s2 $18
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@ -60,8 +60,8 @@ L(skip):
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jal __errno_location
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/* Store the error value. */
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REG_L t4, V0OFF(sp)
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sw t4, 0(v0)
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REG_L t0, V0OFF(sp)
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sw t0, 0(v0)
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/* And just kick back a -1. */
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REG_L ra, RAOFF(sp)
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