entered into RCS

This commit is contained in:
Roland McGrath 1994-11-10 09:58:40 +00:00
parent 18b0df639c
commit 7d99e5148d
4 changed files with 184 additions and 9 deletions

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@ -0,0 +1,83 @@
/* Machine-specific definition for spin locks. Alpha version.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with the GNU C Library; see the file COPYING.LIB. If
not, write to the Free Software Foundation, Inc., 675 Mass Ave,
Cambridge, MA 02139, USA. */
#ifndef _MACHINE_LOCK_H
#define _MACHINE_LOCK_H
/* The type of a spin lock variable. */
typedef __volatile long int __spin_lock_t;
/* Value to initialize `__spin_lock_t' variables to. */
#define __SPIN_LOCK_INITIALIZER 0L
#ifndef _EXTERN_INLINE
#define _EXTERN_INLINE extern __inline
#endif
/* Unlock LOCK. */
_EXTERN_INLINE void
__spin_unlock (__spin_lock_t *__lock)
{
__asm__ __volatile__ (".set noreorder\n"
"mb; stq $31, %0; mb\n"
".set reorder"
: "=m" (__lock));
}
/* Try to lock LOCK; return nonzero if we locked it, zero if another has. */
_EXTERN_INLINE int
__spin_try_lock (register __spin_lock_t *__lock)
{
register long int __rtn, __tmp;
do
{
__asm__ __volatile__ (".set noreorder\n"
/* %0 is TMP, %1 is RTN, %2 is LOCK. */
"mb; ldq_l %0,%2\n" /* Load lock into TMP. */
"or $31,2,%1\n" /* Locked value in RTN. */
".set reorder"
: "=r" (__tmp), "=r" (__rtn) : "m" (__lock));
if (__tmp)
/* The lock is already taken. */
return 0;
/* The lock is not taken; try to get it now. */
__asm__ __volatile__ ("stq_c %0,%1" : "+r" (__rtn), "+m" (__lock));
/* RTN is clear if stq_c was interrupted; loop to try the lock again. */
} while (! __rtn);
/* RTN is now nonzero; we have the lock. */
return __rtn;
}
/* Return nonzero if LOCK is locked. */
_EXTERN_INLINE int
__spin_lock_locked (__spin_lock_t *__lock)
{
return *__lock != 0;
}
#endif /* machine-lock.h */

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@ -1,4 +1,4 @@
/* Copyright (C) 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
/* Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@ -20,7 +20,14 @@ Cambridge, MA 02139, USA. */
#define LOSE asm volatile ("call_pal 0") /* halt */
/* XXX SNARF_ARGS */
#define START_MACHDEP \
asm ("_start: mov $30, $16\n" /* Put initial SP in a0. */
" br $27, 1f\n" /* Load GP from PC. */
"1: ldgp $29, 0($27)\n"
" jmp $26, _start0"); /* Jump to _start0; don't return. */
#define START_ARGS char **sp
#define SNARF_ARGS(argc, argv, envp) \
(envp = &(argv = &sp[1])[(argc = *(int *) sp) + 1])
#define CALL_WITH_SP(fn, sp) \
({ register long int __fn = fn, __sp = (long int) sp; \

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@ -0,0 +1,76 @@
/* Translate Mach exception codes into signal numbers. Alpha version.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with the GNU C Library; see the file COPYING.LIB. If
not, write to the Free Software Foundation, Inc., 675 Mass Ave,
Cambridge, MA 02139, USA. */
#include <hurd.h>
#include <hurd/signal.h>
#include <mach/exception.h>
/* Translate the Mach exception codes, as received in an `exception_raise' RPC,
into a signal number and signal subcode. */
void
_hurd_exception2signal (int exception, int code, int subcode,
int *signo, int *sigcode, int *error)
{
*error = 0;
switch (exception)
{
default:
*signo = SIGIOT;
*sigcode = exception;
break;
case EXC_BAD_ACCESS:
if (code == KERN_PROTECTION_FAILURE)
*signo = SIGSEGV;
else
*signo = SIGBUS;
*sigcode = subcode;
*error = code;
break;
case EXC_BAD_INSTRUCTION:
*signo = SIGILL;
*sigcode = code;
break;
case EXC_ARITHMETIC:
*signo = SIGFPE;
*sigcode = code;
break;
break;
case EXC_EMULATION:
/* 3.0 doesn't give this one, why, I don't know. */
*signo = SIGEMT;
*sigcode = code;
break;
case EXC_SOFTWARE:
*signo = SIGEMT;
*sigcode = code;
break;
case EXC_BREAKPOINT:
*signo = SIGTRAP;
*sigcode = code;
break;
}
}

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@ -25,14 +25,14 @@ struct sigcontext
{
/* These first members are machine-independent. */
int sc_onstack; /* Nonzero if running on sigstack. */
long int sc_onstack; /* Nonzero if running on sigstack. */
sigset_t sc_mask; /* Blocked signals to restore. */
/* MiG reply port this thread is using. */
unsigned int sc_reply_port;
unsigned long int sc_reply_port;
/* Port this thread is doing an interruptible RPC on. */
unsigned int sc_intr_port;
unsigned long int sc_intr_port;
/* Error code associated with this signal (interpreted as `error_t'). */
int sc_error;
@ -41,16 +41,25 @@ struct sigcontext
structure is written to be laid out identically to:
{
struct alpha_thread_state basic;
struct alpha_exc_state exc;
struct alpha_float_state fpu;
}
trampoline.c knows this, so it must be changed if this changes. */
#define sc_alpha_thread_state sc_gs /* Beginning of correspondence. */
#define sc_alpha_thread_state sc_regs /* Beginning of correspondence. */
long int sc_regs[31]; /* General registers $0..$30. */
long int sc_pc; /* Program counter. */
long int sc_ps; /* Processor status. */
/* struct alpha_float_state */
/* struct mips_exc_state */
#define sc_alpha_exc_state sc_badvaddr
unsigned long int sc_badvaddr;
unsigned int sc_cause; /* Machine-level trap code. */
#define SC_CAUSE_SET_SSTEP 1
int sc_used_fpa; /* Nonzero if FPU was used. */
/* struct alpha_float_state
This is only filled in if sc_used_fpa is nonzero. */
#define sc_alpha_float_state sc_fpregs
long int sc_fpregs[32]; /* Floating point registers $f0..$f31. */
double sc_fpregs[31]; /* Floating point registers $f0..$f30. */
long int sc_fpcsr; /* Floating point control/status register. */
};