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Add HAS_RTM

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H.J. Lu 2013-01-03 09:38:20 -08:00
parent a92d7d69e4
commit 5d7dd1ca84
3 changed files with 25 additions and 0 deletions
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9
ChangeLog
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@ -1,3 +1,12 @@
2013-01-03 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Initialize COMMON_CPUID_INDEX_7 element.
* sysdeps/x86_64/multiarch/init-arch.h (bit_RTM): New macro.
(CPUID_RTM): Likewise.
(HAS_RTM): Likewise.
(COMMON_CPUID_INDEX_7): New enum.
2013-01-03 Andreas Schwab <schwab@linux-m68k.org>
[BZ #14981]

7
sysdeps/x86_64/multiarch/init-arch.c
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@ -143,6 +143,13 @@ __init_cpu_features (void)
else
kind = arch_kind_other;
if (__cpu_features.max_cpuid >= 7)
__cpuid_count (7, 0,
__cpu_features.cpuid[COMMON_CPUID_INDEX_7].eax,
__cpu_features.cpuid[COMMON_CPUID_INDEX_7].ebx,
__cpu_features.cpuid[COMMON_CPUID_INDEX_7].ecx,
__cpu_features.cpuid[COMMON_CPUID_INDEX_7].edx);
/* Can we call xgetbv? */
if (CPUID_OSXSAVE)
{

9
sysdeps/x86_64/multiarch/init-arch.h
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@ -26,6 +26,8 @@
#define bit_FMA4_Usable (1 << 8)
/* CPUID Feature flags. */
/* COMMON_CPUID_INDEX_1. */
#define bit_SSE2 (1 << 26)
#define bit_SSSE3 (1 << 9)
#define bit_SSE4_1 (1 << 19)
@ -36,6 +38,9 @@
#define bit_FMA (1 << 12)
#define bit_FMA4 (1 << 16)
/* COMMON_CPUID_INDEX_7. */
#define bit_RTM (1 << 11)
/* XCR0 Feature flags. */
#define bit_XMM_state (1 << 1)
#define bit_YMM_state (2 << 1)
@ -67,6 +72,7 @@
enum
{
COMMON_CPUID_INDEX_1 = 0,
COMMON_CPUID_INDEX_7,
COMMON_CPUID_INDEX_80000001, /* for AMD */
/* Keep the following line at the end. */
COMMON_CPUID_INDEX_MAX
@ -137,6 +143,8 @@ extern const struct cpu_features *__get_cpu_features (void)
HAS_CPUID_FLAG (COMMON_CPUID_INDEX_1, ecx, bit_FMA)
# define CPUID_FMA4 \
HAS_CPUID_FLAG (COMMON_CPUID_INDEX_80000001, ecx, bit_FMA4)
# define CPUID_RTM \
HAS_CPUID_FLAG (COMMON_CPUID_INDEX_7, ebx, bit_RTM)
/* HAS_* evaluates to true if we may use the feature at runtime. */
# define HAS_SSE2 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, edx, bit_SSE2)
@ -144,6 +152,7 @@ extern const struct cpu_features *__get_cpu_features (void)
# define HAS_SSSE3 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSSE3)
# define HAS_SSE4_1 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSE4_1)
# define HAS_SSE4_2 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSE4_2)
# define HAS_RTM HAS_CPU_FEATURE (COMMON_CPUID_INDEX_7, ebx, bit_RTM)
# define index_Fast_Rep_String FEATURE_INDEX_1
# define index_Fast_Copy_Backward FEATURE_INDEX_1