mirror of
git://sourceware.org/git/glibc.git
synced 2024-12-09 04:11:27 +08:00
Sat Feb 17 11:29:29 1996 David Mosberger-Tang <davidm@azstarnet.com>
* sysdeps/unix/sysv/linux/alpha/ioperm.c: new file.
This commit is contained in:
Roland McGrath
parent
6932e44461
commit
56759be20a
441
sysdeps/unix/sysv/linux/alpha/ioperm.c
Normal file
441
sysdeps/unix/sysv/linux/alpha/ioperm.c
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@ -0,0 +1,441 @@
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/* Copyright (C) 1992 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David Mosberger.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc., 675 Mass Ave,
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Cambridge, MA 02139, USA. */
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/* I/O access is restricted to ISA port space (ports 0..65535).
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Modern devices hopefully are sane enough not to put any performance
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critical registers in i/o space.
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On the first call to ioperm() or _sethae(), the entire (E)ISA port
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space is mapped into the virtual address space at address io.base.
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mprotect() calls are then used to enable/disable access to ports. Per
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page, there are PAGE_SIZE>>IO_SHIFT I/O ports (e.g., 256 ports on a
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Low Cost Alpha based system using 8KB pages).
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Keep in mind that this code should be able to run in a 32bit address
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space. It is therefore unreasonable to expect mmap'ing the entire
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sparse address space would work (e.g., the Low Cost Alpha chip has an
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I/O address space that's 512MB large!). */
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#include <errno.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <string.h>
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#undef inb
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#undef inw
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#undef inl
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#undef outb
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#undef outw
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#undef outl
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#define PATH_CPUINFO "/proc/cpuinfo"
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#define MAX_PORT 0x10000
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#define vuip volatile unsigned int *
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#define JENSEN_IO_BASE (IDENT_ADDR + 0x0300000000UL)
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#define APECS_IO_BASE (IDENT_ADDR + 0x01c0000000UL)
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#define ALCOR_IO_BASE (IDENT_ADDR + 0x8580000000UL)
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enum {
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IOSYS_JENSEN = 0, IOSYS_APECS = 1, IOSYS_ALCOR = 2
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} iosys_t;
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struct ioswtch {
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void (*sethae)(unsigned long addr);
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void (*outb)(unsigned char b, unsigned long port);
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void (*outw)(unsigned short b, unsigned long port);
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void (*outl)(unsigned int b, unsigned long port);
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unsigned int (*inb)(unsigned long port);
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unsigned int (*inw)(unsigned long port);
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unsigned int (*inl)(unsigned long port);
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};
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static struct platform {
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const char *name;
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int io_sys;
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} platform[] = {
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{"Alcor", IOSYS_ALCOR},
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{"Avanti", IOSYS_APECS},
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{"Cabriolet", IOSYS_APECS},
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{"EB64+", IOSYS_APECS},
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{"EB66", IOSYS_APECS},
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{"EB66P", IOSYS_APECS},
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{"Jensen", IOSYS_JENSEN},
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{"Mustang", IOSYS_APECS},
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{"Noname", IOSYS_APECS},
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};
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static struct {
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struct hae hae;
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unsigned long base;
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struct ioswtch * swp;
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int sys;
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} io;
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static inline unsigned long
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port_to_cpu_addr (unsigned long port, int iosys, int size)
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{
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if (iosys == IOSYS_JENSEN) {
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return (port << 7) + ((size - 1) << 4) + io.base;
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} else {
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return (port << 5) + ((size - 1) << 3) + io.base;
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}
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}
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static inline void
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inline_sethae (unsigned long addr, int iosys)
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{
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if (iosys == IOSYS_JENSEN) {
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/* hae on the Jensen is bits 31:25 shifted right */
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addr >>= 25;
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if (addr != io.hae.cache) {
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__sethae (addr);
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io.hae.cache = addr;
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}
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} else {
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unsigned long msb;
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/* no need to set hae if msb is 0: */
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msb = addr & 0xf8000000;
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if (msb && msb != io.hae.cache) {
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__sethae (msb);
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io.hae.cache = msb;
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}
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}
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}
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static inline void
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inline_outb (unsigned char b, unsigned long port, int iosys)
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{
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unsigned int w;
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unsigned long addr = port_to_cpu_addr (port, iosys, 1);
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inline_sethae (0, iosys);
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asm ("insbl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
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*(vuip)addr = w;
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mb ();
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}
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static inline void
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inline_outw (unsigned short b, unsigned long port, int iosys)
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{
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unsigned int w;
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unsigned long addr = port_to_cpu_addr (port, iosys, 2);
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inline_sethae (0, iosys);
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asm ("inswl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
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*(vuip)addr = w;
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mb ();
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}
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static inline void
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inline_outl (unsigned int b, unsigned long port, int iosys)
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{
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unsigned long addr = port_to_cpu_addr (port, iosys, 4);
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if (port >= MAX_PORT)
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return;
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inline_sethae (0, iosys);
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*(vuip)addr = b;
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mb ();
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}
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static inline unsigned int
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inline_inb (unsigned long port, int iosys)
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{
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unsigned long result, addr = port_to_cpu_addr (port, iosys, 1);
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inline_sethae (0, iosys);
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result = *(vuip) addr;
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result >>= (port & 3) * 8;
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return 0xffUL & result;
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}
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static inline unsigned int
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inline_inw (unsigned long port, int iosys)
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{
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unsigned long result, addr = port_to_cpu_addr (port, iosys, 2);
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inline_sethae (0, iosys);
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result = *(vuip) addr;
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result >>= (port & 3) * 8;
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return 0xffffUL & result;
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}
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static inline unsigned int
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inline_inl (unsigned long port, int iosys)
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{
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unsigned long addr = port_to_cpu_addr (port, iosys, 4);
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inline_sethae (0, iosys);
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return *(vuip) addr;
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}
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#define DCL_SETHAE(name, iosys) \
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static void \
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name##_sethae (unsigned long addr) \
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{ \
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inline_sethae (addr, IOSYS_##iosys); \
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}
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#define DCL_OUT(name, func, type, iosys) \
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static void \
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name##_##func (unsigned type b, unsigned long addr) \
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{ \
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inline_##func (b, addr, IOSYS_##iosys); \
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}
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#define DCL_IN(name, func, iosys) \
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static unsigned int \
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name##_##func (unsigned long addr) \
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{ \
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return inline_##func (addr, IOSYS_##iosys); \
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}
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DCL_SETHAE(jensen, JENSEN)
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DCL_OUT(jensen, outb, char, JENSEN)
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DCL_OUT(jensen, outw, short, JENSEN)
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DCL_OUT(jensen, outl, int, JENSEN)
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DCL_IN(jensen, inb, JENSEN)
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DCL_IN(jensen, inw, JENSEN)
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DCL_IN(jensen, inl, JENSEN)
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/* The APECS functions are also used for ALCOR since they are
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identical. */
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DCL_SETHAE(apecs, APECS)
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DCL_OUT(apecs, outb, char, APECS)
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DCL_OUT(apecs, outw, short, APECS)
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DCL_OUT(apecs, outl, int, APECS)
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DCL_IN(apecs, inb, APECS)
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DCL_IN(apecs, inw, APECS)
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DCL_IN(apecs, inl, APECS)
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struct ioswtch ioswtch[] = {
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{
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jensen_sethae,
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jensen_outb, jensen_outw, jensen_outl,
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jensen_inb, jensen_inw, jensen_inl
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},
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{
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apecs_sethae,
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apecs_outb, apecs_outw, apecs_outl,
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apecs_inb, apecs_inw, apecs_inl
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}
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};
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static int
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init_iosys (void)
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{
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char name[256], value[256];
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FILE * fp;
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int i;
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fp = fopen (PATH_CPUINFO, "r");
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if (!fp)
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return -1;
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while (fscanf (fp, "%256[^:]: %256[^\n]\n", name, value) == 2) {
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if (strncmp (name, "system type", 11) == 0) {
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for (i = 0; i < sizeof (platform) / sizeof (platform[0]); ++i) {
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if (strcmp (platform[i].name, value) == 0) {
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fclose (fp);
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io.sys = platform[i].io_sys;
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if (io.sys == IOSYS_JENSEN)
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io.swp = &ioswtch[0];
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else
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io.swp = &ioswtch[1];
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return 0;
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}
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}
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}
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}
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fclose (fp);
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errno = ENODEV;
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return -1;
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}
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int
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_ioperm (unsigned long from, unsigned long num, int turn_on)
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{
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unsigned long addr, len;
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int prot;
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if (!io.swp && init_iosys () < 0)
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return -1;
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/* this test isn't as silly as it may look like; consider overflows! */
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if (from >= MAX_PORT || from + num > MAX_PORT) {
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errno = EINVAL;
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return -1;
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}
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if (turn_on) {
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if (!io.base) {
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unsigned long base;
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int fd;
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io.hae.reg = 0; /* not used in user-level */
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io.hae.cache = 0;
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__sethae (io.hae.cache); /* synchronize with hw */
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fd = open ("/dev/mem", O_RDWR);
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if (fd < 0)
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return fd;
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switch (io.sys) {
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case IOSYS_JENSEN: base = JENSEN_IO_BASE; break;
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case IOSYS_APECS: base = APECS_IO_BASE; break;
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case IOSYS_ALCOR: base = ALCOR_IO_BASE; break;
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default:
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errno = ENODEV;
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return -1;
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}
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addr = port_to_cpu_addr (from, io.sys, 1);
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addr &= PAGE_MASK;
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len = port_to_cpu_addr (MAX_PORT, io.sys, 1) - addr;
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io.base =
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(unsigned long) __mmap (0, len, PROT_NONE, MAP_SHARED, fd, base);
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close (fd);
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if ((long) io.base == -1)
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return -1;
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}
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prot = PROT_READ | PROT_WRITE;
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} else {
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if (!io.base)
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return 0; /* never was turned on... */
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/* turnoff access to relevant pages: */
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prot = PROT_NONE;
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}
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addr = port_to_cpu_addr (from, io.sys, 1);
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addr &= PAGE_MASK;
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len = port_to_cpu_addr (from + num, io.sys, 1) - addr;
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return mprotect ((void *) addr, len, prot);
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}
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int
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_iopl (unsigned int level)
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{
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if (level > 3) {
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errno = EINVAL;
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return -1;
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}
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if (level) {
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return _ioperm (0, MAX_PORT, 1);
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}
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return 0;
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}
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void
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_sethae (unsigned long addr)
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{
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if (!io.swp && init_iosys () < 0)
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return;
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io.swp->sethae (addr);
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}
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void
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_outb (unsigned char b, unsigned long port)
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{
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if (port >= MAX_PORT)
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return;
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io.swp->outb (b, port);
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}
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void
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_outw (unsigned short b, unsigned long port)
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{
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if (port >= MAX_PORT)
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return;
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io.swp->outw (b, port);
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}
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void
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_outl (unsigned int b, unsigned long port)
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{
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if (port >= MAX_PORT)
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return;
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io.swp->outl (b, port);
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}
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unsigned int
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_inb (unsigned long port)
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{
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return io.swp->inb (port);
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}
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unsigned int
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_inw (unsigned long port)
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{
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return io.swp->inw (port);
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}
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unsigned int
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_inl (unsigned long port)
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{
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return io.swp->inl (port);
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}
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weak_alias (_sethae, sethae);
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weak_alias (_ioperm, ioperm);
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weak_alias (_iopl, iopl);
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weak_alias (_inb, inb);
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weak_alias (_inw, inw);
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weak_alias (_inl, inl);
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weak_alias (_outb, outb);
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weak_alias (_outw, outw);
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weak_alias (_outl, outl);
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