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AArch64: Optimize strcpy
Unroll the main loop. Large strings are around 20% faster on modern CPUs. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
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@ -30,7 +30,6 @@
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* MTE compatible.
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*/
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/* Arguments and results. */
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#define dstin x0
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#define srcin x1
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#define result x0
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@ -76,14 +75,14 @@ ENTRY (STRCPY)
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ld1 {vdata.16b}, [src]
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cmeq vhas_nul.16b, vdata.16b, 0
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lsl shift, srcin, 2
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shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */
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shrn vend.8b, vhas_nul.8h, 4
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fmov synd, dend
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lsr synd, synd, shift
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cbnz synd, L(tail)
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ldr dataq, [src, 16]!
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cmeq vhas_nul.16b, vdata.16b, 0
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shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */
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shrn vend.8b, vhas_nul.8h, 4
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fmov synd, dend
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cbz synd, L(start_loop)
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@ -102,13 +101,10 @@ ENTRY (STRCPY)
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IFSTPCPY (add result, dstin, len)
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ret
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.p2align 4,,8
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L(tail):
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rbit synd, synd
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clz len, synd
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lsr len, len, 2
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.p2align 4
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L(less16):
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tbz len, 3, L(less8)
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sub tmp, len, 7
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@ -141,31 +137,37 @@ L(zerobyte):
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.p2align 4
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L(start_loop):
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sub len, src, srcin
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sub tmp, srcin, dstin
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ldr dataq2, [srcin]
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add dst, dstin, len
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sub dst, src, tmp
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str dataq2, [dstin]
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.p2align 5
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L(loop):
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str dataq, [dst], 16
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ldr dataq, [src, 16]!
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str dataq, [dst], 32
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ldr dataq, [src, 16]
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cmeq vhas_nul.16b, vdata.16b, 0
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umaxp vend.16b, vhas_nul.16b, vhas_nul.16b
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fmov synd, dend
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cbnz synd, L(loopend)
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str dataq, [dst, -16]
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ldr dataq, [src, 32]!
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cmeq vhas_nul.16b, vdata.16b, 0
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umaxp vend.16b, vhas_nul.16b, vhas_nul.16b
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fmov synd, dend
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cbz synd, L(loop)
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add dst, dst, 16
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L(loopend):
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shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */
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fmov synd, dend
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sub dst, dst, 31
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#ifndef __AARCH64EB__
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rbit synd, synd
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#endif
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clz len, synd
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lsr len, len, 2
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sub tmp, len, 15
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ldr dataq, [src, tmp]
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str dataq, [dst, tmp]
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IFSTPCPY (add result, dst, len)
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add dst, dst, len
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ldr dataq, [dst, tmp]
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str dataq, [dst]
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IFSTPCPY (add result, dst, 15)
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ret
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END (STRCPY)
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