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AArch64: Improve strnlen performance
Optimize strnlen by avoiding UMINV which is slow on most cores. On Neoverse N1 large strings are 1.8x faster than the current version, and bench-strnlen is 50% faster overall. This version is MTE compatible. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
This commit is contained in:
Wilco Dijkstra
Wilco Dijkstra
parent
eb68d7d23c
commit
252cad02d4
@ -22,197 +22,105 @@
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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* ARMv8-a, AArch64, Advanced SIMD.
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* MTE compatible.
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*/
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/* Arguments and results. */
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#define srcin x0
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#define len x0
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#define limit x1
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#define cntin x1
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#define result x0
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/* Locals and temporaries. */
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#define src x2
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#define data1 x3
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#define data2 x4
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#define data2a x5
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#define has_nul1 x6
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#define has_nul2 x7
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#define tmp1 x8
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#define tmp2 x9
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#define tmp3 x10
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#define tmp4 x11
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#define zeroones x12
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#define pos x13
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#define limit_wd x14
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#define synd x3
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#define shift x4
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#define wtmp w4
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#define tmp x4
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#define cntrem x5
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#define dataq q2
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#define datav v2
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#define datab2 b3
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#define dataq2 q3
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#define datav2 v3
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#define REP8_01 0x0101010101010101
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#define REP8_7f 0x7f7f7f7f7f7f7f7f
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#define REP8_80 0x8080808080808080
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#define qdata q0
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#define vdata v0
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#define vhas_chr v1
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#define vrepmask v2
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#define vend v3
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#define dend d3
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ENTRY_ALIGN_AND_PAD (__strnlen, 6, 9)
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/*
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Core algorithm:
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For each 16-byte chunk we calculate a 64-bit syndrome value with four bits
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per byte. For even bytes, bits 0-3 are set if the relevant byte matched the
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requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are
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set likewise for odd bytes so that adjacent bytes can be merged. Since the
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bits in the syndrome reflect the order in which things occur in the original
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string, counting trailing zeros identifies exactly which byte matched. */
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ENTRY (__strnlen)
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PTR_ARG (0)
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SIZE_ARG (1)
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cbz limit, L(hit_limit)
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mov zeroones, #REP8_01
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bic src, srcin, #15
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ands tmp1, srcin, #15
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b.ne L(misaligned)
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/* Calculate the number of full and partial words -1. */
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sub limit_wd, limit, #1 /* Limit != 0, so no underflow. */
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lsr limit_wd, limit_wd, #4 /* Convert to Qwords. */
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bic src, srcin, 15
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mov wtmp, 0xf00f
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cbz cntin, L(nomatch)
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ld1 {vdata.16b}, [src], 16
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dup vrepmask.8h, wtmp
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cmeq vhas_chr.16b, vdata.16b, 0
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lsl shift, srcin, 2
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and vhas_chr.16b, vhas_chr.16b, vrepmask.16b
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addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
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fmov synd, dend
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lsr synd, synd, shift
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cbz synd, L(start_loop)
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L(finish):
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rbit synd, synd
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clz synd, synd
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lsr result, synd, 2
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cmp cntin, result
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csel result, cntin, result, ls
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ret
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/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
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(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
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can be done in parallel across the entire word. */
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/* The inner loop deals with two Dwords at a time. This has a
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slightly higher start-up cost, but we should win quite quickly,
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especially on cores with a high number of issue slots per
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cycle, as we get much better parallelism out of the operations. */
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L(start_loop):
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sub tmp, src, srcin
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subs cntrem, cntin, tmp
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b.ls L(nomatch)
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/* Start of critial section -- keep to one 64Byte cache line. */
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/* Make sure that it won't overread by a 16-byte chunk */
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add tmp, cntrem, 15
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tbnz tmp, 4, L(loop32_2)
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ldp data1, data2, [src], #16
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L(realigned):
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sub tmp1, data1, zeroones
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orr tmp2, data1, #REP8_7f
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sub tmp3, data2, zeroones
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orr tmp4, data2, #REP8_7f
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bic has_nul1, tmp1, tmp2
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bic has_nul2, tmp3, tmp4
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subs limit_wd, limit_wd, #1
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orr tmp1, has_nul1, has_nul2
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ccmp tmp1, #0, #0, pl /* NZCV = 0000 */
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b.eq L(loop)
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/* End of critical section -- keep to one 64Byte cache line. */
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.p2align 5
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L(loop32):
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ldr qdata, [src], 16
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cmeq vhas_chr.16b, vdata.16b, 0
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umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
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fmov synd, dend
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cbnz synd, L(end)
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L(loop32_2):
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ldr qdata, [src], 16
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subs cntrem, cntrem, 32
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cmeq vhas_chr.16b, vdata.16b, 0
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b.ls L(end)
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umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
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fmov synd, dend
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cbz synd, L(loop32)
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orr tmp1, has_nul1, has_nul2
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cbz tmp1, L(hit_limit) /* No null in final Qword. */
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/* We know there's a null in the final Qword. The easiest thing
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to do now is work out the length of the string and return
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MIN (len, limit). */
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sub len, src, srcin
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cbz has_nul1, L(nul_in_data2)
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#ifdef __AARCH64EB__
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mov data2, data1
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L(end):
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and vhas_chr.16b, vhas_chr.16b, vrepmask.16b
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addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
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sub src, src, 16
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mov synd, vend.d[0]
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sub result, src, srcin
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#ifndef __AARCH64EB__
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rbit synd, synd
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#endif
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sub len, len, #8
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mov has_nul2, has_nul1
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L(nul_in_data2):
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#ifdef __AARCH64EB__
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/* For big-endian, carry propagation (if the final byte in the
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string is 0x01) means we cannot use has_nul directly. The
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easiest way to get the correct byte is to byte-swap the data
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and calculate the syndrome a second time. */
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rev data2, data2
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sub tmp1, data2, zeroones
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orr tmp2, data2, #REP8_7f
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bic has_nul2, tmp1, tmp2
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#endif
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sub len, len, #8
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rev has_nul2, has_nul2
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clz pos, has_nul2
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add len, len, pos, lsr #3 /* Bits to bytes. */
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cmp len, limit
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csel len, len, limit, ls /* Return the lower value. */
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RET
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clz synd, synd
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add result, result, synd, lsr 2
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cmp cntin, result
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csel result, cntin, result, ls
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ret
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L(loop):
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ldr dataq, [src], #16
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uminv datab2, datav.16b
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mov tmp1, datav2.d[0]
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subs limit_wd, limit_wd, #1
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ccmp tmp1, #0, #4, pl /* NZCV = 0000 */
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b.eq L(loop_end)
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ldr dataq, [src], #16
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uminv datab2, datav.16b
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mov tmp1, datav2.d[0]
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subs limit_wd, limit_wd, #1
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ccmp tmp1, #0, #4, pl /* NZCV = 0000 */
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b.ne L(loop)
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L(loop_end):
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/* End of critical section -- keep to one 64Byte cache line. */
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L(nomatch):
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mov result, cntin
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ret
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cbnz tmp1, L(hit_limit) /* No null in final Qword. */
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/* We know there's a null in the final Qword. The easiest thing
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to do now is work out the length of the string and return
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MIN (len, limit). */
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#ifdef __AARCH64EB__
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rev64 datav.16b, datav.16b
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#endif
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/* Set te NULL byte as 0xff and the rest as 0x00, move the data into a
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pair of scalars and then compute the length from the earliest NULL
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byte. */
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cmeq datav.16b, datav.16b, #0
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#ifdef __AARCH64EB__
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mov data1, datav.d[1]
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mov data2, datav.d[0]
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#else
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mov data1, datav.d[0]
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mov data2, datav.d[1]
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#endif
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cmp data1, 0
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csel data1, data1, data2, ne
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sub len, src, srcin
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sub len, len, #16
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rev data1, data1
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add tmp2, len, 8
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clz tmp1, data1
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csel len, len, tmp2, ne
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add len, len, tmp1, lsr 3
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cmp len, limit
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csel len, len, limit, ls /* Return the lower value. */
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RET
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L(misaligned):
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/* Deal with a partial first word.
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We're doing two things in parallel here;
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1) Calculate the number of words (but avoiding overflow if
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limit is near ULONG_MAX) - to do this we need to work out
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limit + tmp1 - 1 as a 65-bit value before shifting it;
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2) Load and mask the initial data words - we force the bytes
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before the ones we are interested in to 0xff - this ensures
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early bytes will not hit any zero detection. */
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sub limit_wd, limit, #1
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neg tmp4, tmp1
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cmp tmp1, #8
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and tmp3, limit_wd, #15
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lsr limit_wd, limit_wd, #4
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mov tmp2, #~0
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ldp data1, data2, [src], #16
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lsl tmp4, tmp4, #3 /* Bytes beyond alignment -> bits. */
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add tmp3, tmp3, tmp1
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#ifdef __AARCH64EB__
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/* Big-endian. Early bytes are at MSB. */
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lsl tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#else
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#endif
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add limit_wd, limit_wd, tmp3, lsr #4
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orr data1, data1, tmp2
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orr data2a, data2, tmp2
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csinv data1, data1, xzr, le
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csel data2, data2, data2a, le
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b L(realigned)
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L(hit_limit):
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mov len, limit
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RET
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END (__strnlen)
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libc_hidden_def (__strnlen)
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weak_alias (__strnlen, strnlen)
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