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Optimized sparc floor{,f} routines.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S: New file. * sysdeps/sparc/sparc64/fpu/s_floor.S: New file. * sysdeps/sparc/sparc64/fpu/s_floorf.S: New file.
This commit is contained in:
David S. Miller
parent
d6b5aa5879
commit
1aff59a3f7
@ -1,5 +1,10 @@
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2012-02-27 David S. Miller <davem@davemloft.net>
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S: New file.
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S: New file.
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* sysdeps/sparc/sparc64/fpu/s_floor.S: New file.
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* sysdeps/sparc/sparc64/fpu/s_floorf.S: New file.
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Fix accidental use of
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frame pointer instead of stack pointer relative arg slot.
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise.
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87
sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S
Normal file
87
sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S
Normal file
@ -0,0 +1,87 @@
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/* floor function, sparc32 v9 version.
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Copyright (C) 2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller <davem@davemloft.net>, 2012.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Since changing the rounding mode is extremely expensive, we
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try to round up using a method that is rounding mode
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agnostic.
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We add then subtract (or subtract than add if the initial
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value was negative) 2**23 to the value, then subtract it
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back out.
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This will clear out the fractional portion of the value.
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One of two things will happen for non-whole initial values.
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Either the rounding mode will round it up, or it will be
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rounded down. If the value started out whole, it will be
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equal after the addition and subtraction. This means we
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can accurately detect with one test whether we need to add
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another 1.0 to round it up properly.
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We pop constants into the FPU registers using the incoming
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argument stack slots, since this avoid having to use any
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PIC references. We also thus avoid having to allocate a
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register window.
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VIS instructions are used to facilitate the formation of
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easier constants, and the propagation of the sign bit. */
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#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
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#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
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#define ZERO %f10 /* 0.0 */
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__floor)
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sethi %hi(TWO_FIFTYTWO), %o2
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sllx %o0, 32, %o0
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sethi %hi(ONE_DOT_ZERO), %o3
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or %o0, %o1, %o0
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stx %o0, [%sp + 72]
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sllx %o2, 32, %o2
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fzero ZERO
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sllx %o3, 32, %o3
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ldd [%sp + 72], %f0
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fnegd ZERO, SIGN_BIT
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stx %o2, [%sp + 72]
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fabsd %f0, %f14
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ldd [%sp + 72], %f16
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fcmpd %fcc3, %f14, %f16
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fmovduge %fcc3, ZERO, %f16
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fand %f0, SIGN_BIT, SIGN_BIT
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for %f16, SIGN_BIT, %f16
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faddd %f0, %f16, %f18
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fsubd %f18, %f16, %f18
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fcmpd %fcc2, %f18, %f0
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stx %o3, [%sp + 72]
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ldd [%sp + 72], %f20
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fmovdule %fcc2, ZERO, %f20
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fsubd %f18, %f20, %f0
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fabsd %f0, %f0
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retl
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for %f0, SIGN_BIT, %f0
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END (__floor)
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weak_alias (__floor, floor)
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83
sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S
Normal file
83
sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S
Normal file
@ -0,0 +1,83 @@
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/* Float floor function, sparc32 v9 version.
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Copyright (C) 2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller <davem@davemloft.net>, 2012.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Since changing the rounding mode is extremely expensive, we
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try to round up using a method that is rounding mode
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agnostic.
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We add then subtract (or subtract than add if the initial
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value was negative) 2**23 to the value, then subtract it
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back out.
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This will clear out the fractional portion of the value.
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One of two things will happen for non-whole initial values.
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Either the rounding mode will round it up, or it will be
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rounded down. If the value started out whole, it will be
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equal after the addition and subtraction. This means we
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can accurately detect with one test whether we need to add
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another 1.0 to round it up properly.
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We pop constants into the FPU registers using the incoming
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argument stack slots, since this avoid having to use any
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PIC references. We also thus avoid having to allocate a
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register window.
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VIS instructions are used to facilitate the formation of
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easier constants, and the propagation of the sign bit. */
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#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
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#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
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#define ZERO %f10 /* 0.0 */
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__floorf)
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st %o0, [%sp + 68]
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sethi %hi(TWO_TWENTYTHREE), %o2
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sethi %hi(ONE_DOT_ZERO), %o3
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fzeros ZERO
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ld [%sp + 68], %f0
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fnegs ZERO, SIGN_BIT
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st %o2, [%sp + 68]
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fabss %f0, %f14
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ld [%sp + 68], %f16
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fcmps %fcc3, %f14, %f16
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fmovsuge %fcc3, ZERO, %f16
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fands %f0, SIGN_BIT, SIGN_BIT
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fors %f16, SIGN_BIT, %f16
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fadds %f0, %f16, %f1
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fsubs %f1, %f16, %f1
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fcmps %fcc2, %f1, %f0
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st %o3, [%sp + 68]
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ld [%sp + 68], %f9
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fmovsule %fcc2, ZERO, %f9
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fsubs %f1, %f9, %f0
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fabss %f0, %f0
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retl
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fors %f0, SIGN_BIT, %f0
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END (__floorf)
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weak_alias (__floorf, floorf)
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83
sysdeps/sparc/sparc64/fpu/s_floor.S
Normal file
83
sysdeps/sparc/sparc64/fpu/s_floor.S
Normal file
@ -0,0 +1,83 @@
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/* floor function, sparc64 version.
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Copyright (C) 2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller <davem@davemloft.net>, 2012.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Since changing the rounding mode is extremely expensive, we
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try to round up using a method that is rounding mode
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agnostic.
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We add then subtract (or subtract than add if the initial
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value was negative) 2**23 to the value, then subtract it
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back out.
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This will clear out the fractional portion of the value.
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One of two things will happen for non-whole initial values.
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Either the rounding mode will round it up, or it will be
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rounded down. If the value started out whole, it will be
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equal after the addition and subtraction. This means we
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can accurately detect with one test whether we need to add
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another 1.0 to round it up properly.
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We pop constants into the FPU registers using the incoming
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argument stack slots, since this avoid having to use any
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PIC references. We also thus avoid having to allocate a
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register window.
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VIS instructions are used to facilitate the formation of
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easier constants, and the propagation of the sign bit. */
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#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
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#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
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#define ZERO %f10 /* 0.0 */
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__floor)
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sethi %hi(TWO_FIFTYTWO), %o2
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sethi %hi(ONE_DOT_ZERO), %o3
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fzero ZERO
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sllx %o2, 32, %o2
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fnegd ZERO, SIGN_BIT
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sllx %o3, 32, %o3
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stx %o2, [%sp + STACK_BIAS + 128]
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fabsd %f0, %f14
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ldd [%sp + STACK_BIAS + 128], %f16
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fcmpd %fcc3, %f14, %f16
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fmovduge %fcc3, ZERO, %f16
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fand %f0, SIGN_BIT, SIGN_BIT
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for %f16, SIGN_BIT, %f16
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faddd %f0, %f16, %f18
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fsubd %f18, %f16, %f18
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fcmpd %fcc2, %f18, %f0
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stx %o3, [%sp + STACK_BIAS + 128]
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ldd [%sp + STACK_BIAS + 128], %f20
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fmovdule %fcc2, ZERO, %f20
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fsubd %f18, %f20, %f0
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fabsd %f0, %f0
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retl
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for %f0, SIGN_BIT, %f0
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END (__floor)
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weak_alias (__floor, floor)
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81
sysdeps/sparc/sparc64/fpu/s_floorf.S
Normal file
81
sysdeps/sparc/sparc64/fpu/s_floorf.S
Normal file
@ -0,0 +1,81 @@
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/* Float floor function, sparc64 version.
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Copyright (C) 2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller <davem@davemloft.net>, 2012.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Since changing the rounding mode is extremely expensive, we
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try to round up using a method that is rounding mode
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agnostic.
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We add then subtract (or subtract than add if the initial
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value was negative) 2**23 to the value, then subtract it
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back out.
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This will clear out the fractional portion of the value.
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One of two things will happen for non-whole initial values.
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Either the rounding mode will round it up, or it will be
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rounded down. If the value started out whole, it will be
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equal after the addition and subtraction. This means we
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can accurately detect with one test whether we need to add
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another 1.0 to round it up properly.
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We pop constants into the FPU registers using the incoming
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argument stack slots, since this avoid having to use any
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PIC references. We also thus avoid having to allocate a
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register window.
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VIS instructions are used to facilitate the formation of
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easier constants, and the propagation of the sign bit. */
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#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
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#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
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#define ZERO %f10 /* 0.0 */
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__floorf)
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sethi %hi(TWO_TWENTYTHREE), %o2
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sethi %hi(ONE_DOT_ZERO), %o3
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fzeros ZERO
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fnegs ZERO, SIGN_BIT
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st %o2, [%sp + STACK_BIAS + 128]
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fabss %f1, %f14
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ld [%sp + STACK_BIAS + 128], %f16
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fcmps %fcc3, %f14, %f16
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fmovsuge %fcc3, ZERO, %f16
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fands %f1, SIGN_BIT, SIGN_BIT
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fors %f16, SIGN_BIT, %f16
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fadds %f1, %f16, %f5
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fsubs %f5, %f16, %f5
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fcmps %fcc2, %f5, %f1
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st %o3, [%sp + STACK_BIAS + 128]
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ld [%sp + STACK_BIAS + 128], %f9
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fmovsule %fcc2, ZERO, %f9
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fsubs %f5, %f9, %f0
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fabss %f0, %f0
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retl
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fors %f0, SIGN_BIT, %f0
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END (__floorf)
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weak_alias (__floorf, floorf)
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