2020-10-26 23:48:01 +08:00
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/* Record the register state before and after a variant PCS call.
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2023-01-07 05:08:04 +08:00
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Copyright (C) 2020-2023 Free Software Foundation, Inc.
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2020-10-26 23:48:01 +08:00
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public License as
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published by the Free Software Foundation; either version 2.1 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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.variant_pcs vpcs_call
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.global vpcs_call
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.type vpcs_call, %function
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vpcs_call:
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.cfi_startproc
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hint 34 /* bti c. */
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/* Save register state to *x0. */
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stp x0, x1, [x0]
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stp x2, x3, [x0, 16]
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stp x4, x5, [x0, 32]
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stp x6, x7, [x0, 48]
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stp x8, x9, [x0, 64]
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stp x10, x11, [x0, 80]
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stp x12, x13, [x0, 96]
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stp x14, x15, [x0, 112]
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stp x16, x17, [x0, 128]
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stp x18, x19, [x0, 144]
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stp x20, x21, [x0, 160]
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stp x22, x23, [x0, 176]
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stp x24, x25, [x0, 192]
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stp x26, x27, [x0, 208]
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stp x28, x29, [x0, 224]
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mov x1, sp
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stp x30, x1, [x0, 240]
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stp q0, q1, [x0, 256]
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stp q2, q3, [x0, 288]
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stp q4, q5, [x0, 320]
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stp q6, q7, [x0, 352]
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stp q8, q9, [x0, 384]
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stp q10, q11, [x0, 416]
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stp q12, q13, [x0, 448]
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stp q14, q15, [x0, 480]
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stp q16, q17, [x0, 512]
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stp q18, q19, [x0, 544]
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stp q20, q21, [x0, 576]
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stp q22, q23, [x0, 608]
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stp q24, q25, [x0, 640]
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stp q26, q27, [x0, 672]
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stp q28, q29, [x0, 704]
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stp q30, q31, [x0, 736]
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ret
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.cfi_endproc
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.size vpcs_call, .-vpcs_call
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.global vpcs_call_regs
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.type vpcs_call_regs, %function
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vpcs_call_regs:
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.cfi_startproc
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hint 34 /* bti c. */
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stp x29, x30, [sp, -160]!
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mov x29, sp
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/* Save callee-saved registers. */
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stp x19, x20, [sp, 16]
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stp x21, x22, [sp, 32]
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stp x23, x24, [sp, 48]
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stp x25, x26, [sp, 64]
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stp x27, x28, [sp, 80]
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stp d8, d9, [sp, 96]
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stp d10, d11, [sp, 112]
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stp d12, d13, [sp, 128]
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stp d14, d15, [sp, 144]
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/* Initialize most registers from *x1, and save x0, x1, x29, x30,
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and sp (== x29), so *x1 contains the register state. */
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stp x0, x1, [x1]
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str x29, [x1, 232]
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ldp x2, x3, [x1, 16]
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ldp x4, x5, [x1, 32]
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ldp x6, x7, [x1, 48]
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ldp x8, x9, [x1, 64]
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ldp x10, x11, [x1, 80]
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ldp x12, x13, [x1, 96]
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ldp x14, x15, [x1, 112]
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ldp x16, x17, [x1, 128]
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ldp x18, x19, [x1, 144]
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ldp x20, x21, [x1, 160]
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ldp x22, x23, [x1, 176]
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ldp x24, x25, [x1, 192]
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ldp x26, x27, [x1, 208]
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ldr x28, [x1, 224]
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/* Skip x29, x30, sp. */
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ldp q0, q1, [x1, 256]
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ldp q2, q3, [x1, 288]
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ldp q4, q5, [x1, 320]
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ldp q6, q7, [x1, 352]
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ldp q8, q9, [x1, 384]
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ldp q10, q11, [x1, 416]
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ldp q12, q13, [x1, 448]
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ldp q14, q15, [x1, 480]
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ldp q16, q17, [x1, 512]
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ldp q18, q19, [x1, 544]
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ldp q20, q21, [x1, 576]
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ldp q22, q23, [x1, 608]
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ldp q24, q25, [x1, 640]
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ldp q26, q27, [x1, 672]
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ldp q28, q29, [x1, 704]
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ldp q30, q31, [x1, 736]
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/* Emulate a BL using B, but save x30 before the branch. */
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adr x30, .L_return_addr
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stp x30, x29, [x1, 240]
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b vpcs_call
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.L_return_addr:
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/* Restore callee-saved registers. */
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ldp x19, x20, [sp, 16]
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ldp x21, x22, [sp, 32]
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ldp x23, x24, [sp, 48]
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ldp x25, x26, [sp, 64]
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ldp x27, x28, [sp, 80]
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ldp d8, d9, [sp, 96]
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ldp d10, d11, [sp, 112]
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ldp d12, d13, [sp, 128]
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ldp d14, d15, [sp, 144]
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ldp x29, x30, [sp], 160
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ret
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.cfi_endproc
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.size vpcs_call_regs, .-vpcs_call_regs
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