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f54fd62edc
(incscc): Use a match_operand with cc_register to match
the condition code register.
(decscc, *condbranch, *condbranch_reversed, *mov_scc): Likewise.
(*mov_negscc, *mov_notscc, *cond_return): Likewise.
(*cond_return_inverted, *ior_scc, *cond_move): Likewise.
(insv): New expand.
(andsi_notsi_si): Renamed from *andsi_notsi_si.
(andsi_not_shiftsi_si): New insn.
(*minmax_arithsi): Don't match this insn if operand1 is an
eliminable register.
({sin,cos}*): Delete, since the ARM always emulates these its
faster to call a library function.
(movsicc, *movsicc_insn): Make operand0 an s_register_operand,
and operand3 an arm_not_operand. Use cc_register to match the
condition code register.
(mov[sd]fcc*): Make operand[0,2] s_register_operands, and operand3
the nonmemory_operand. Use cc_register to match the condition
code register.
(*ifcompare_plus_move): Move before *ifcompare_arith_move. Just do
a split for the output.
(*ifcompare_move_plus): Similarly, but relative
to *ifcompare_move_arith.
(*if_plus_move, *if_move_plus): New patterns.
(*ifcompare_arith_arith): Simplify the alternatives down to just one,
and split the insn before output.
(*if_arith_arith, *if_arith_move, *if_move_arith): New patterns.
(*ifcompare_move_not, *ifcompare_not_move): Simplify and split the
insn before output.
(*if_move_not, *if_not_move): New patterns.
(*ifcompare_shift_move, *ifcompare_move_shift): Simplify and split the
insn before output.
(*if_shift_move, *if_move_shift): New patterns.
(*ifcompare_shift_shift): Simplify and split the insn before output.
(*if_shift_shift): New pattern.
(*ifcompare_not_arith, *ifcompare_arith_not): Simplify and split the
insn before output.
(*if_not_arith, *if_arith_not): New patterns.
(*ifcompare_neg_move, *ifcompare_move_neg): Simplify and split the
insn before output.
(*if_neg_move, *if_move_neg): New patterns..
From-SVN: r13840
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