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There are various VSX insns that do the same job as (older) AltiVec insns, just with a wider range of possible registers. Many patterns for such insns have the "v" alternative before the "wa" alternative, which makes the output less readable than possible (since vs32 is v0, and most insns before or after this insn will be VSX as well). This changes the define_insns for the mrg and perm machine instructions to prefer the VSX form. No behaviour change. Only one testcase needed a little adjustment as well. 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org> * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form. (altivec_vmrglw_direct): Ditto. (altivec_vperm_<mode>_direct): Ditto. (altivec_vperm_v8hiv16qi): Ditto. (*altivec_vperm_<mode>_uns_internal): Ditto. (*altivec_vpermr_<mode>_internal): Ditto. (vperm_v8hiv4si): Ditto. (vperm_v16qiv8hi): Ditto. gcc/testsuite/ * gcc.target/powerpc/vsx-vector-6.p9.c: Allow xxperm as perm as well.
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