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ec46904edf
Add widening add and subtract patterns to the aarch64 backend. These allow taking vectors of N elements of size S and performing and add/subtract on the high or low half widening the resulting elements and storing N/2 elements of size 2*S. These correspond to the addl,addl2,subl,subl2 instructions. gcc/ChangeLog: * config/aarch64/aarch64-simd.md: New patterns vec_widen_saddl_lo/hi_<mode>.
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