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With the `*insv_aligned', `*extzv_aligned' and `*extv_aligned' insns we are going to adjust the bit-field location if it is in memory, so only allow such location addresses that can be offset, excluding external symbol references in the PIC mode in particular. This fixes an ICE like: during RTL pass: final In file included from .../gcc/testsuite/gcc.dg/torture/vshuf-v16qi.c:11: .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc: In function 'test_13': .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc:27:1: internal compiler error: in change_address_1, at emit-rtl.c:2275 .../gcc/testsuite/gcc.dg/torture/vshuf-16.inc:16:1: note: in expansion of macro 'T' .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc:28:1: note: in expansion of macro 'TESTS' 0x10a34b33 change_address_1 .../gcc/emit-rtl.c:2275 0x10a358af adjust_address_1(rtx_def*, machine_mode, poly_int<1u, long>, int, int, int, poly_int<1u, long>) .../gcc/emit-rtl.c:2409 0x11d2505f output_97 .../gcc/config/vax/vax.md:806 0x10adec4b get_insn_template(int, rtx_insn*) .../gcc/final.c:2070 0x10ae1c5b final_scan_insn_1 .../gcc/final.c:3039 0x10ae2257 final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*) .../gcc/final.c:3152 0x10ade9a3 final_1 .../gcc/final.c:2020 0x10ae6157 rest_of_handle_final .../gcc/final.c:4658 0x10ae6697 execute .../gcc/final.c:4736 Please submit a full bug report, with preprocessed source if appropriate. Please include the complete backtrace with any bug report. See <https://gcc.gnu.org/bugs/> for instructions. compiler exited with status 1 FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (internal compiler error) triggered by an RTL instruction like: (insn 97 96 98 (set (reg:SI 5 %r5 [88]) (zero_extract:SI (mem/c:SI (symbol_ref:SI ("b") <var_decl 0x7ffff7f801b0 b>) [0 b+0 S4 A128]) (const_int 8 [0x8]) (const_int 24 [0x18]))) ".../gcc/testsuite/gcc.dg/torture/vshuf-main.inc":28:1 97 {*extzv_aligned} (nil)) and removes these regressions: FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (internal compiler error) FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (test for excess errors) FAIL: gcc.dg/torture/vshuf-v4hi.c -O2 (internal compiler error) FAIL: gcc.dg/torture/vshuf-v4hi.c -O2 (test for excess errors) FAIL: gcc.dg/torture/vshuf-v8hi.c -O2 (internal compiler error) FAIL: gcc.dg/torture/vshuf-v8hi.c -O2 (test for excess errors) FAIL: gcc.dg/torture/vshuf-v8qi.c -O2 (internal compiler error) FAIL: gcc.dg/torture/vshuf-v8qi.c -O2 (test for excess errors) However expand typically presents pseudo-registers rather than memory references to these insns, so a further rework is required to make a better use of the code variant they are supposed to produce. This at least fixes the problem at hand. gcc/ * config/vax/vax.md (*insv_aligned, *extzv_aligned) (*extv_aligned): Also make sure the memory address of a bit-field location can be adjusted in the PIC mode.
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