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gcc/ 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-modes.def (CC_FPU, CC_FPU_UNEQ): New modes. * config/arc/arc-opts.h (FPU_SP, FPU_SF, FPU_SC, FPU_SD, FPU_DP) (FPU_DF, FPU_DC, FPU_DD, FXP_DP): Define. * config/arc/arc.c (arc_init): Check FPU options. (get_arc_condition_code): Handle new CC_FPU* modes. (arc_select_cc_mode): Likewise. (arc_conditional_register_usage): Allow 64 bit datum into even-odd register pair only. Allow access for ARCv2 accumulator. (gen_compare_reg): Whenever we have FPU support use FPU compare instructions. (arc_reorg): Don't generate brcc insns when FPU compare instructions are involved. * config/arc/arc.h (TARGET_DPFP): Add TARGET_FP_DPAX condition. (TARGET_OPTFPE): Add condition when ARC EM can use optimized floating point emulation. (ACC_REG_FIRST, ACC_REG_LAST, ACCL_REGNO, ACCH_REGNO): Define. (REVERSE_CONDITION): Add new CC_FPU* modes. (TARGET_FP_SP_BASE): Define. (TARGET_FP_DP_BASE): Likewise. (TARGET_FP_SP_FUSED): Likewise. (TARGET_FP_DP_FUSED): Likewise. (TARGET_FP_SP_CONV): Likewise. (TARGET_FP_DP_CONV): Likewise. (TARGET_FP_SP_SQRT): Likewise. (TARGET_FP_DP_SQRT): Likewise. (TARGET_FP_DP_AX): Likewise. * config/arc/arc.md (ARCV2_ACC): New constant. (type): New fpu type attribute. (SDF): Conditional iterator. (cstore<mode>, cbranch<mode>): Change expand condition. (addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3): New expands, handles FPU/FPX cases as well. * config/arc/arc.opt (mfpu): New option. * config/arc/fpx.md (addsf3_fpx, subsf3_fpx, mulsf3_fpx): Renamed. (adddf3, muldf3, subdf3): Removed. * config/arc/predicates.md (proper_comparison_operator): Recognize CC_FPU* modes. * config/arc/fpu.md: New file. * doc/invoke.texi (ARC Options): Document mfpu option. From-SVN: r233451
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