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* gcc/config/cris/cris.md: Group related constants together, with
comments local.
(CRIS_UNSPEC_PLT_GOTREL, CRIS_UNSPEC_PLT_PCREL, CRIS_UNSPEC_PCREL)
(CRIS_UNSPEC_CASESI): New constants.
(CRIS_UNSPEC_PLT): Remove constant.
(CRIS_ACR_REGNUM): New constant.
("slottable"): New attr alternatives "has_return_slot" and
"has_call_slot".
("cc"): New attr alternatives "noov32" and "rev".
((eq_attr "slottable" "has_call_slot"))
((eq_attr "slottable" "has_return_slot")): New define_delays.
("movdi", "movsi"): Adjust operands for CRIS v32.
("tstdi", "cmpdi", "adddi3", "subdi3", "uminsi3")
("indirect_jump"): Ditto. Make define_expand.
("*tstdi_non_v32", "*tstdi_v32", "*tst<mode>_cmp")
("*tst<mode>_non_cmp", "*cmpdi_non_v32", "*cmpdi_v32")
("*movdi_v32", "*adddi3_non_v32", "*adddi3_v32")
("*addsi3_non_v32", "*addsi3_v32", "*addhi3_non_v32")
("*addhi3_v32", "*addqi3_non_v32", "*addqi3_v32")
("*subdi3_non_v32", "*subdi3_v32", "*subsi3_non_v32")
("*subsi3_v32", "*sub<mode>3_nonv32", "*sub<mode>3_v32")
("*andqi3_non_v32", "*andqi3_v32", "*iorsi3_non_v32")
("*iorsi3_v32", "*iorhi3_non_v32", "*iorhi3_v32")
("*iorqi3_non_v32", "*iorqi3_v32", "*uminsi3_non_v32")
("*uminsi3_v32", "*indirect_jump_non_v32", "*indirect_jump_v32")
("*expanded_call_v32", "*expanded_call_value_v32"): New patterns,
for the corresponding standard name.
("tst<mode>"): Limit to BW and make define_expand.
("tstsi"): Make separate insn, adjusting for CRIS v32.
("*cmp_swapext<mode>"): Adjust for v32. Specify "rev" for attr "cc".
("cmpsi", "cmp<mode>"): Remove special cases for zero. Specify
attr "cc".
("*btst"): Don't match for TARGET_CCINIT. Replace test of
register with compatible "cmpq 0". Specify attr "cc".
("*movdi_insn_non_v32"): New pattern, replacing "*movdi_insn" and
define_split.
(define_split for DI move): Match CRIS v32 only.
("*movsi_got_load", "*movsi_internal", "*addi"): Adjust for CRIS
v32.
("load_multiple", "store_multiple", "*addsbw_v32", "*addubw_v32")
("*adds<mode>_v32", "*addu<mode>_v32", "*bound<mode>_v32")
("*casesi_jump_v32", "*expanded_andsi_v32", "*expanded_andhi_v32")
("*extop<mode>si_v32", "*extopqihi_v32", "*andhi_lowpart_v32")
("*andqi_lowpart_v32", "cris_casesi_v32"): New patterns.
("add<mode>3"): Make addsi3, addhi3 and addqi3 define_expand.
("sub<mode>3"): Ditto subsi3, subhi3 and subqi3.
("ior<mode>3"): Ditto iorsi3, iorhi3 and iorqi3.
("*extopqihi_non_v32"): Replace "*extopqihi".
("*extop<mode>si_non_v32"): Replace "*extop<mode>si".
("*addxqihi_swap_non_v32"): Rename from "*extopqihi_swap", make
non-v32 only.
("*extop<mode>si_swap_non_v32"): Ditto "*extop<mode>si_swap".
("*expanded_andsi_non_v32"): Ditto "*expanded_andsi".
("*expanded_andhi_non_v32"): Ditto "*expanded_andhi".
("*andhi_lowpart_non_v32"): Ditto "*andhi_lowpart".
("*andqi_lowpart_non_v32"): Ditto "*andqi_lowpart".
("*expanded_call_non_v32"): Ditto "*expanded_call". Change from
"cris_general_operand_or_plt_symbol" to "general_operand".
("*expanded_call_value_non_v32") Ditto "*expanded_call_value".
("*casesi_adds_w", "mstep_shift", "mstep_mul")
("*expanded_call_side", "*expanded_call_value_side")
(op-extend-split, op-extend-split-rx=rz, op-extend-split-swapped)
(op-extend-split-swapped-rx=rz, op-extend, op-split-rx=rz)
(op-split-swapped, op-split-swapped-rx=rz): Make non-v32 only.
("dstep_mul", "xorsi3", "one_cmplsi2", "<shlr>si3")
("*expanded_<shlr><mode>", "*<shlr><mode>_lowpart", "ashl<mode>3")
("*ashl<mode>_lowpart", "abssi2", "clzsi2", "bswapsi2", "cris_swap_bits"): Specify "noov32" for
attr "cc".
("<su>mulsi3_highpart"): Ditto. Correct operand 0 to
register_operand.
("andqi3"): Make define_expand.
("*return_expanded"): For attr "slottable", change from "has_slot"
to "has_return_slot".
("cris_casesi_non_v32"): New pattern, old contents of "casesi".
("casesi"): Divert into "cris_casesi_v32" and
"cris_casesi_non_v32".
(moversideqi, movemsideqi, mover2side): Require
TARGET_SIDE_EFFECT_PREFIXES.
(gotplt-to-plt, gotplt-to-plt-side): Change from CRIS_UNSPEC_PLT
to CRIS_UNSPEC_PLT_GOTREL.
From-SVN: r130971
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