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438ffa2a8f
Even though ix86_hard_regno_mode_ok doesn't allow xmm16-xmm31 nor ymm16-ymm31 in 128/256 bit modes when AVX512VL is disabled, LRA can still generate reg to reg moves with xmm16-xmm31 and ymm16-ymm31 in 128/256 bit modes. Remove mode size check in ix86_get_ssemov. gcc/ PR target/94561 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check. gcc/testsuite/ PR target/94561 * gcc.target/i386/pr94561.c: New test.
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