(xcoff_inlining): Likewise.
(xcoff_current_function_file): Likewise.
(xcoff_output_standard_types): Remove TARGET_64BIT dependencies from
int and unsigned int.
From-SVN: r10730
(expand_divmod, case TRUNC_DIV_EXPR): Only reject
larger-than-HOST_BITS_PER_WIDE_INT modes for general constants,
not for powers-of-2.
From-SVN: r10727
(perror_with_name, pfatal_with_name, perror_exec): Don't assume that
the returned value from my_strerror contains no '%'s.
(sys_nerr): Declare only if HAVE_STRERROR is not defined.
From-SVN: r10714
* function.c (identify_blocks): Start with a chain of BLOCKs to
match the rest of the backend (dbxout.c), instead of just one
BLOCK.
(reorder_blocks): Ditto.
(all_blocks): Ditto.
* stmt.c (find_loop_tree_blocks): Pass the toplevel list of
blocks, not just the first subblock.
Fixes unroll1.C.
From-SVN: r10712
* arm/lib1funcs.asm (RET, RETCOND): Define according to whether we
are compiling for 32 or 26 bit mode.
(all return instructions): Use RET or RETCOND as appropriate.
From-SVN: r10690
(attributes): Rearrange order, so that condition clobbering
can be automatically determined for call insns.
(attribute cpu): Add new cpu ARM7.
(attribute type): Add new type MULT.
(attribute prog_mode): New attribute.
(attribute conds): Clobbering of call insns can now be determined
using prog_mode attribute.
(function units "write_buf", "write_blockage"): Model the write buffer
as two function units, so that conflicts are avoided more often.
(funcion unit "core"): New function unit, so that elapsed cycles can
be more accurately determined.
(all anonymous patterns): Add names.
(mulsidi3, umulsidi3): New patterns available with fast multiply
variants.
(all call insns): The conds attribute is now determined automatically.
(zero_extendhisi): Expand for architecture 4 variants if appropriate.
(*zero_extendhisi_insn): New pattern.
(extendqi{hi,si}, extendhisi): Expand for architecture 4 variants if
appropriate.
(*extendhisi_insn, *extendqihi, *extendqisi): New patterns.
(storehi_single_op): New expand.
(movhi): Handle architecture 4 expansion.
(*movhi_insn_arch4): New pattern.
(*movhi_*): Adjust applicability conditions to handle architecture 4.
(reload_outdf): Handle pre/post inc/dec reloads.
(tablejump): Delete.
(matcher for optimized tablejump): delete.
(casesi): New expand.
(casesi_internal): New pattern.
(*movsi_insn): Much simpified now that constants are handled
properly.
(movaddr): New expand.
(movsf, movdf): No need to force constants into the pool any more.
(*movdf_hard_insn): Much simplified.
(consttable_4, consttable_8, consttable_end, align_4): New patterns
for supporting embedded constants.
From-SVN: r10682
(CPP_SPEC): Add defines for the cpu type, hard or soft floating
point, and the APCS PC size.
(TARGET_*): Restructure.
(ARM_FLAG_*): Many new definitions for different target options, not
all of which are supported yet.
(TARGET_SWITCHES): Use the ARM_FLAG_* definitions instead of explicit
numbers.
(prog_mode_type): New enum.
(floating_point_type): Split emulated floating point into FP_SOFT[23].
(OVERRIDE_OPTIONS): Call arm_override_options.
(ARM_CPU_NAME): Default to NULL if not defined by a subtarget.
(BYTES_BIG_ENDIAN): Can now be set as a compilation option.
(RETURN_IN_MEMORY, DEFAULT_PCC_STRUCT_RETURN): New definitions.
(GO_IF_LEGITIMATE_OFFSET): Use different HImode offsets if compiling
for an architecture 4 target. The offsets for floating point
constants are the same as for integers if compiling TARGET_SOFT_FLOAT
(GO_IF_LEGITIMATE_ADDRESS): Don't allow PRE_INC and POST_DEC if
the size is more than 4 bytes. Restrict the range offsets for DImode;
likewise for DFmode when TARGET_SOFT_FLOAT.
(LEGITIMIZE_ADDRESS): Use symbol_mentioned_p, not LEGITIMATE_CONSTANT_P
to determine if a constant address might be better in a register.
Handle DFmode addresses in the same way as DImode if TARGET_SOFT_FLOAT.
(LOAD_EXTEND_OP): If arm_arch4, then HImode also zero-extends.
(SECONDARY_OUTPUT_RELOAD_CLASS): No need to handle floating
point constants any more, since arm_reorg will deal with them.
(LEGITIMATE_CONSTANT_P): Is now anything that doesn't contain a
LABEL.
(GO_IF_LEGITIMATE_ADDRESS): Recognize addresses expressions generated
by arm_reorg, but only after reload has completed.
(MACHINE_DEPENDENT_REORG): Define.
(ASM_OUTPUT_SPECIAL_POOL_ENTRY): There should be nothing left in
the pool, even if it might look like it.
(most assembler-specific defines): Move to arm/aout.h.
(CONSTANT_ADDRESS_P): Can't directly access constant strings when
generating assembler for ARMASM.
(ENCODE_SECTION_INFO): Don't define if generating ARMASM assembler.
(ASM_OUTPUT_INTERNAL_LABEL): Generalize, so that it can be used
with all targeted assemblers.
(ASM_OUTPUT_LABEL): Call arm_asm_output_label.
From-SVN: r10681
(arm_split_constant): Split most of the functionality into
arm_gen_constant. Try to decide which way of handling the constant
is optimal for the target processor.
(arm_prgmode): New enum.
(target_{cpu,fpe}_name, arm_fast_multiply, arm_arch4): New variables.
(all_procs): New table describing processors and capabilities.
(arm_override_options): New function.
(arm_return_in_memory): New function.
(arm_rtx_costs): Adjust the multiply costs to cope with processors
with fast multiplication instructions.
(output_move_double): Use the ldm/stm variants more efficiently.
Delete cases that can no-longer occur.
(output_return_instruction, output_func_epilogue): Use TARGET_APCS_32,
not TARGET_6 for determining the type of return instruction to emit.
(final_prescan_insn case CALL_INSN): Use TARGET_APCS_32, not TARGET_6
to determine condition preservation.
({symbol,label}_mentioned_p): New functions.
(add_constant, dump_table, fixit, find_barrier, broken_move): New
support functions for handling constant spilling.
(arm_reorg): New constant spilling pass, for putting unhandlable
constants into the rtl where we can load them efficiently.
(output_load_symbol): Delete.
(strings_fpa): Use a form which is common to both GAS and ARMASM.
(output_return_instruction, output_func_epilogue): Call
assemble_external_libcall, before trying to generate an abort call
in the assembler.
(arm_asm_output_label): Call ARM_OUTPUT_LABEL, rather than assuming
that labels are followed by a colon.
(aof_text_section, aof_add_import, aof_delete_import,
aof_dump_imports): New functions to support ARMASM assembler
generation.
From-SVN: r10680
(shiftcosts): For SH3, max cost of arithmetic right
shift is 3.
(expand_ashiftrt): For SH3, if shift cost is more than 3, then
call gen_ashrsi3_d to use shad instruction.
From-SVN: r10674
