* verify.cc (handle_jsr_insn): Don't fail if `jsr' appears at end
of bytecode.
(handle_ret_insn): Fail if returning to jsr that appears at end of
bytecode.
From-SVN: r63744
* config/rs6000/rs6000.c (rs6000_multipass_dfa_lookahead): Delete.
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Delete.
(rs6000_variable_issue): Do not return negative value.
(rs6000_issue_rate): Uniformly set issue rate to 1 for first
scheduling pass.
From-SVN: r63736
* tree-inline.c (find_builtin_longjmp_call): Save and restore
lineno and input_filename.
(find_alloca_call): Likewise.
(inlinable_function_p): Run the langhook earlier.
* calls.c (compute_argument_addresses): Give the new MEMs a
minimum alignment of PARM_BOUNDARY.
cp/
* decl.c (start_function): Clear DECL_NUM_STMTS.
* class.c (get_vtable_decl): Use vtbl_type_node.
(build_primary_vtable): Check for it.
From-SVN: r63733
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
From-SVN: r63732
* sh.h (OVERRIDE_OPTIONS): Set default values for align_loops
and align_jumps if not set.
Force align_jumps to be at least 2.
When relaxing, force align_functions to be at least the maximum of
align_loops, align_jumps and 4.
* sh.c (find_barrier, barrier_align): Honour align_jumps_log.
(sh_loop_align): Honour align_loops_log.
* sh.md (length attribute): Use prev_nonnote_insn instead of PREV_INSN
to check for indirect_jump_scratch.
(indirect_jump_scratch): Add second set.
* sh.c (output_far_jump): Use prev_nonnote_insn instead of PREV_INSN
when looking for indirect_jump_scratch.
Extract scratch register taking new structure of indirect_jump_scratch
into account.
(gen_block_redirect): Set INSN_SCOPE for indirect_jump_scratch.
From-SVN: r63728
* gcc.c-torture/execute/960312-1.x: New file, must pass -mshort
for HC11/HC12 (asm needs two int registers).
* gcc.c-torture/compile/20020312-1.x: New file, don't execute on
HC11/HC12 because the test uses an asm which needs two 32-bit
registers.
From-SVN: r63697
* gcc.c-torture/compile/920501-12.x: New file, must pass -mshort
for HC11/HC12 (array is too large otherwise).
* gcc.c-torture/compile/920501-4.x: New file, likewise.
* gcc.c-torture/compile/20010518-2.x: Likewise.
* gcc.c-torture/compile/980506-1.x: Don't execute this test on
HC11/HC12 (array is too large).
From-SVN: r63693
2003-03-02 Kurt Garloff <garloff@suse.de>
* params.def: Introduce parameter max-inline-insns-rtl for
a separate limit for the RTL inliner.
* params.h: Likewise.
* integrate.c (function_cannot_inline_p): Use it.
* toplev.c (decode_f_option): Set multiple parameters
controlling inlining with -finline-limit.
* params.def: Fix orthographic and typographic errors.
* doc/invoke.texi: Document parameters controlling inlining
and the way -finline-limit sets multiple of them.
* tree.h (struct tree_decl): Introduce inlined_function_flag,
recording whether the function became eligible for inlining
by a compiler flag rather than the declaration.
Provide DID_INLINE_FUNC macro to access it.
* c-decl.c (grokdeclarator): Set DID_INLINE_FUNC.
* cp/decl.c (grokfndecl): Likewise.
* toplev.c (rest_of_compilation): Likewise.
* cp/optimize (maybe_clone_body): Copy DID_INLINE_FUNC.
* print-tree.c (print_node): Report it.
* params.def: Introduce new max-inline-insns-auto limit.
* params.h: Likewise.
* tree-inline.c (inlinable_function_p): Apply it to functions
with DID_INLINE_FUNC set.
* toplev.c (decode_f_option): Initialize it from -finline-limit
value.
* doc/invoke.texi: Document new parameter.
From-SVN: r63688
* config/m68hc11/m68hc11.c (m68hc11_shift_operator): New function.
* config/m68hc11/m68hc11-protos.h (m68hc11_shift_operator): Declare.
* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register.
* config/m68hc11/m68hc11.md ("rotrhi3", "rotlhi3"): New patterns for
rotatert and rotate.
("rotrhi3_const", "rotlhi3_const"): Rename of old 'rotrhi3' insns.
("*rotrhi3", "*rotlhi3"): New insn pattern for non-const rotatert.
("*rotrhi3_addr"): New split for shift insns on address register.
("*lshrhi3", "*ashrhi3", "*ashlhi3_2"): Use new split.
* config/m68hc11/larith.asm (___rotlhi3): New asm function.
(___rotrhi3): Likewise.
* config/m68hc11/t-m68hc11-gas (LIB1ASMFUNCS): Build them.
From-SVN: r63677
